perf, x86: Fix key indexing in Pentium-4 PMU
[linux-2.6-block.git] / arch / arm / mach-mx2 / mxt_td60.c
CommitLineData
143a179d
ACA
1/*
2 * Copyright (C) 2000 Deep Blue Solutions Ltd
3 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
4 * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#include <linux/platform_device.h>
22#include <linux/mtd/mtd.h>
23#include <linux/mtd/map.h>
24#include <linux/mtd/partitions.h>
25#include <linux/mtd/physmap.h>
26#include <linux/i2c.h>
27#include <linux/irq.h>
28#include <mach/common.h>
29#include <mach/hardware.h>
30#include <asm/mach-types.h>
31#include <asm/mach/arch.h>
32#include <asm/mach/time.h>
33#include <asm/mach/map.h>
34#include <linux/gpio.h>
35#include <mach/imx-uart.h>
36#include <mach/iomux.h>
37#include <mach/mxc_nand.h>
38#include <mach/i2c.h>
9e3e7afe 39#include <linux/i2c/pca953x.h>
143a179d
ACA
40#include <mach/imxfb.h>
41#include <mach/mmc.h>
42
43#include "devices.h"
44
45static unsigned int mxt_td60_pins[] __initdata = {
46 /* UART0 */
47 PE12_PF_UART1_TXD,
48 PE13_PF_UART1_RXD,
49 PE14_PF_UART1_CTS,
50 PE15_PF_UART1_RTS,
51 /* UART1 */
52 PE3_PF_UART2_CTS,
53 PE4_PF_UART2_RTS,
54 PE6_PF_UART2_TXD,
55 PE7_PF_UART2_RXD,
56 /* UART2 */
57 PE8_PF_UART3_TXD,
58 PE9_PF_UART3_RXD,
59 PE10_PF_UART3_CTS,
60 PE11_PF_UART3_RTS,
143a179d
ACA
61 /* FEC */
62 PD0_AIN_FEC_TXD0,
63 PD1_AIN_FEC_TXD1,
64 PD2_AIN_FEC_TXD2,
65 PD3_AIN_FEC_TXD3,
66 PD4_AOUT_FEC_RX_ER,
67 PD5_AOUT_FEC_RXD1,
68 PD6_AOUT_FEC_RXD2,
69 PD7_AOUT_FEC_RXD3,
70 PD8_AF_FEC_MDIO,
71 PD9_AIN_FEC_MDC,
72 PD10_AOUT_FEC_CRS,
73 PD11_AOUT_FEC_TX_CLK,
74 PD12_AOUT_FEC_RXD0,
75 PD13_AOUT_FEC_RX_DV,
76 PD14_AOUT_FEC_RX_CLK,
77 PD15_AOUT_FEC_COL,
78 PD16_AIN_FEC_TX_ER,
79 PF23_AIN_FEC_TX_EN,
80 /* I2C1 */
81 PD17_PF_I2C_DATA,
82 PD18_PF_I2C_CLK,
83 /* I2C2 */
84 PC5_PF_I2C2_SDA,
85 PC6_PF_I2C2_SCL,
86 /* FB */
87 PA5_PF_LSCLK,
88 PA6_PF_LD0,
89 PA7_PF_LD1,
90 PA8_PF_LD2,
91 PA9_PF_LD3,
92 PA10_PF_LD4,
93 PA11_PF_LD5,
94 PA12_PF_LD6,
95 PA13_PF_LD7,
96 PA14_PF_LD8,
97 PA15_PF_LD9,
98 PA16_PF_LD10,
99 PA17_PF_LD11,
100 PA18_PF_LD12,
101 PA19_PF_LD13,
102 PA20_PF_LD14,
103 PA21_PF_LD15,
104 PA22_PF_LD16,
105 PA23_PF_LD17,
106 PA25_PF_CLS,
107 PA27_PF_SPL_SPR,
108 PA28_PF_HSYNC,
109 PA29_PF_VSYNC,
110 PA30_PF_CONTRAST,
111 PA31_PF_OE_ACD,
112 /* OWIRE */
113 PE16_AF_OWIRE,
114 /* SDHC1*/
115 PE18_PF_SD1_D0,
116 PE19_PF_SD1_D1,
117 PE20_PF_SD1_D2,
118 PE21_PF_SD1_D3,
119 PE22_PF_SD1_CMD,
120 PE23_PF_SD1_CLK,
9e3e7afe 121 PF8_AF_ATA_IORDY,
143a179d
ACA
122 /* SDHC2*/
123 PB4_PF_SD2_D0,
124 PB5_PF_SD2_D1,
125 PB6_PF_SD2_D2,
126 PB7_PF_SD2_D3,
127 PB8_PF_SD2_CMD,
128 PB9_PF_SD2_CLK,
129};
130
131static struct mxc_nand_platform_data mxt_td60_nand_board_info = {
132 .width = 1,
133 .hw_ecc = 1,
134};
135
136static struct imxi2c_platform_data mxt_td60_i2c_data = {
137 .bitrate = 100000,
138};
139
9e3e7afe
ACA
140/* PCA9557 */
141static int mxt_td60_pca9557_setup(struct i2c_client *client,
142 unsigned gpio_base, unsigned ngpio,
143 void *context)
144{
145 static int mxt_td60_gpio_value[] = {
146 -1, -1, -1, -1, -1, -1, -1, 1
147 };
148 int n;
149
150 for (n = 0; n < ARRAY_SIZE(mxt_td60_gpio_value); ++n) {
151 gpio_request(gpio_base + n, "MXT_TD60 GPIO Exp");
152 if (mxt_td60_gpio_value[n] < 0)
153 gpio_direction_input(gpio_base + n);
154 else
155 gpio_direction_output(gpio_base + n,
156 mxt_td60_gpio_value[n]);
157 gpio_export(gpio_base + n, 0);
158 }
159
160 return 0;
161}
162
163static struct pca953x_platform_data mxt_td60_pca9557_pdata = {
164 .gpio_base = 240, /* place PCA9557 after all MX27 gpio pins */
165 .invert = 0, /* Do not invert */
166 .setup = mxt_td60_pca9557_setup,
167};
168
143a179d 169static struct i2c_board_info mxt_td60_i2c_devices[] = {
9e3e7afe
ACA
170 {
171 I2C_BOARD_INFO("pca9557", 0x18),
172 .platform_data = &mxt_td60_pca9557_pdata,
173 },
143a179d
ACA
174};
175
176static struct imxi2c_platform_data mxt_td60_i2c2_data = {
177 .bitrate = 100000,
178};
179
180static struct i2c_board_info mxt_td60_i2c2_devices[] = {
181};
182
183static struct imx_fb_videomode mxt_td60_modes[] = {
184 {
185 .mode = {
186 .name = "Chimei LW700AT9003",
187 .refresh = 60,
188 .xres = 800,
189 .yres = 480,
190 .pixclock = 30303,
191 .hsync_len = 64,
192 .left_margin = 0x67,
193 .right_margin = 0x68,
194 .vsync_len = 16,
195 .upper_margin = 0x0f,
196 .lower_margin = 0x0f,
197 },
198 .bpp = 16,
199 .pcr = 0xFA208B83,
200 },
201};
202
203static struct imx_fb_platform_data mxt_td60_fb_data = {
204 .mode = mxt_td60_modes,
205 .num_modes = ARRAY_SIZE(mxt_td60_modes),
206
207 /*
208 * - HSYNC active high
209 * - VSYNC active high
210 * - clk notenabled while idle
211 * - clock inverted
212 * - data not inverted
213 * - data enable low active
214 * - enable sharp mode
215 */
216 .pwmr = 0x00A903FF,
217 .lscr1 = 0x00120300,
218 .dmacr = 0x00020010,
219};
220
221static int mxt_td60_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
222 void *data)
223{
9e3e7afe 224 return request_irq(IRQ_GPIOF(8), detect_irq, IRQF_TRIGGER_FALLING,
143a179d
ACA
225 "sdhc1-card-detect", data);
226}
227
228static void mxt_td60_sdhc1_exit(struct device *dev, void *data)
229{
9e3e7afe 230 free_irq(IRQ_GPIOF(8), data);
143a179d
ACA
231}
232
233static struct imxmmc_platform_data sdhc1_pdata = {
234 .init = mxt_td60_sdhc1_init,
235 .exit = mxt_td60_sdhc1_exit,
236};
237
238static struct platform_device *platform_devices[] __initdata = {
239 &mxc_fec_device,
240};
241
242static struct imxuart_platform_data uart_pdata[] = {
243 {
244 .flags = IMXUART_HAVE_RTSCTS,
245 }, {
246 .flags = IMXUART_HAVE_RTSCTS,
247 }, {
248 .flags = IMXUART_HAVE_RTSCTS,
143a179d
ACA
249 },
250};
251
252static void __init mxt_td60_board_init(void)
253{
254 mxc_gpio_setup_multiple_pins(mxt_td60_pins, ARRAY_SIZE(mxt_td60_pins),
255 "MXT_TD60");
256
257 mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
258 mxc_register_device(&mxc_uart_device1, &uart_pdata[1]);
259 mxc_register_device(&mxc_uart_device2, &uart_pdata[2]);
143a179d
ACA
260 mxc_register_device(&mxc_nand_device, &mxt_td60_nand_board_info);
261
262 i2c_register_board_info(0, mxt_td60_i2c_devices,
263 ARRAY_SIZE(mxt_td60_i2c_devices));
264
265 i2c_register_board_info(1, mxt_td60_i2c2_devices,
266 ARRAY_SIZE(mxt_td60_i2c2_devices));
267
268 mxc_register_device(&mxc_i2c_device0, &mxt_td60_i2c_data);
269 mxc_register_device(&mxc_i2c_device1, &mxt_td60_i2c2_data);
270 mxc_register_device(&mxc_fb_device, &mxt_td60_fb_data);
271 mxc_register_device(&mxc_sdhc_device0, &sdhc1_pdata);
272
273 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
274}
275
276static void __init mxt_td60_timer_init(void)
277{
278 mx27_clocks_init(26000000);
279}
280
281static struct sys_timer mxt_td60_timer = {
282 .init = mxt_td60_timer_init,
283};
284
285MACHINE_START(MXT_TD60, "Maxtrack i-MXT TD60")
286 /* maintainer: Maxtrack Industrial */
287 .phys_io = AIPI_BASE_ADDR,
288 .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
289 .boot_params = PHYS_OFFSET + 0x100,
290 .map_io = mx27_map_io,
291 .init_irq = mx27_init_irq,
292 .init_machine = mxt_td60_board_init,
293 .timer = &mxt_td60_timer,
294MACHINE_END
295