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1 | /* |
2 | * System controller support for Armada 370 and XP platforms. | |
3 | * | |
4 | * Copyright (C) 2012 Marvell | |
5 | * | |
6 | * Lior Amsalem <alior@marvell.com> | |
7 | * Gregory CLEMENT <gregory.clement@free-electrons.com> | |
8 | * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | |
9 | * | |
10 | * This file is licensed under the terms of the GNU General Public | |
11 | * License version 2. This program is licensed "as is" without any | |
12 | * warranty of any kind, whether express or implied. | |
13 | * | |
14 | * The Armada 370 and Armada XP SoCs both have a range of | |
15 | * miscellaneous registers, that do not belong to a particular device, | |
16 | * but rather provide system-level features. This basic | |
17 | * system-controller driver provides a device tree binding for those | |
18 | * registers, and implements utility functions offering various | |
19 | * features related to those registers. | |
20 | * | |
21 | * For now, the feature set is limited to restarting the platform by a | |
22 | * soft-reset, but it might be extended in the future. | |
23 | */ | |
24 | ||
25 | #include <linux/kernel.h> | |
26 | #include <linux/init.h> | |
27 | #include <linux/of_address.h> | |
28 | #include <linux/io.h> | |
7b6d864b | 29 | #include <linux/reboot.h> |
31af49db GC |
30 | |
31 | static void __iomem *system_controller_base; | |
32 | ||
33 | struct mvebu_system_controller { | |
34 | u32 rstoutn_mask_offset; | |
35 | u32 system_soft_reset_offset; | |
36 | ||
37 | u32 rstoutn_mask_reset_out_en; | |
38 | u32 system_soft_reset; | |
39 | }; | |
40 | static struct mvebu_system_controller *mvebu_sc; | |
41 | ||
42 | const struct mvebu_system_controller armada_370_xp_system_controller = { | |
43 | .rstoutn_mask_offset = 0x60, | |
44 | .system_soft_reset_offset = 0x64, | |
45 | .rstoutn_mask_reset_out_en = 0x1, | |
46 | .system_soft_reset = 0x1, | |
47 | }; | |
48 | ||
49 | const struct mvebu_system_controller orion_system_controller = { | |
50 | .rstoutn_mask_offset = 0x108, | |
51 | .system_soft_reset_offset = 0x10c, | |
52 | .rstoutn_mask_reset_out_en = 0x4, | |
53 | .system_soft_reset = 0x1, | |
54 | }; | |
55 | ||
56 | static struct of_device_id of_system_controller_table[] = { | |
57 | { | |
58 | .compatible = "marvell,orion-system-controller", | |
59 | .data = (void *) &orion_system_controller, | |
60 | }, { | |
61 | .compatible = "marvell,armada-370-xp-system-controller", | |
62 | .data = (void *) &armada_370_xp_system_controller, | |
63 | }, | |
64 | { /* end of list */ }, | |
65 | }; | |
66 | ||
7b6d864b | 67 | void mvebu_restart(enum reboot_mode mode, const char *cmd) |
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68 | { |
69 | if (!system_controller_base) { | |
70 | pr_err("Cannot restart, system-controller not available: check the device tree\n"); | |
71 | } else { | |
72 | /* | |
73 | * Enable soft reset to assert RSTOUTn. | |
74 | */ | |
75 | writel(mvebu_sc->rstoutn_mask_reset_out_en, | |
76 | system_controller_base + | |
77 | mvebu_sc->rstoutn_mask_offset); | |
78 | /* | |
79 | * Assert soft reset. | |
80 | */ | |
81 | writel(mvebu_sc->system_soft_reset, | |
82 | system_controller_base + | |
83 | mvebu_sc->system_soft_reset_offset); | |
84 | } | |
85 | ||
86 | while (1) | |
87 | ; | |
88 | } | |
89 | ||
90 | static int __init mvebu_system_controller_init(void) | |
91 | { | |
92 | struct device_node *np; | |
93 | ||
94 | np = of_find_matching_node(NULL, of_system_controller_table); | |
95 | if (np) { | |
96 | const struct of_device_id *match = | |
97 | of_match_node(of_system_controller_table, np); | |
98 | BUG_ON(!match); | |
99 | system_controller_base = of_iomap(np, 0); | |
100 | mvebu_sc = (struct mvebu_system_controller *)match->data; | |
abe511ac | 101 | of_node_put(np); |
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102 | } |
103 | ||
104 | return 0; | |
105 | } | |
106 | ||
107 | arch_initcall(mvebu_system_controller_init); |