[linux-2.6-block.git] / arch / arm / mach-davinci / board-da850-evm.c

/*
 * TI DA850/OMAP-L138 EVM board
 *
 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
 *
 * Derived from: arch/arm/mach-davinci/board-da830-evm.c
 * Original Copyrights follow:
 *
 * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
 * the terms of the GNU General Public License version 2. This program
 * is licensed "as is" without any warranty of any kind, whether express
 * or implied.
 */
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/console.h>
#include <linux/i2c.h>
#include <linux/i2c/at24.h>
#include <linux/i2c/pca953x.h>
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/regulator/machine.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>

#include <mach/cp_intc.h>
#include <mach/da8xx.h>
#include <mach/nand.h>
#include <mach/mux.h>

#define DA850_EVM_PHY_MASK		0x1
#define DA850_EVM_MDIO_FREQUENCY	2200000 /* PHY bus frequency */

#define DA850_LCD_PWR_PIN		GPIO_TO_PIN(2, 8)
#define DA850_LCD_BL_PIN		GPIO_TO_PIN(2, 15)

#define DA850_MMCSD_CD_PIN		GPIO_TO_PIN(4, 0)
#define DA850_MMCSD_WP_PIN		GPIO_TO_PIN(4, 1)

#define DA850_MII_MDIO_CLKEN_PIN	GPIO_TO_PIN(2, 6)

static struct mtd_partition da850_evm_norflash_partition[] = {
	{
		.name           = "bootloaders + env",
		.offset         = 0,
		.size           = SZ_512K,
		.mask_flags     = MTD_WRITEABLE,
	},
	{
		.name           = "kernel",
		.offset         = MTDPART_OFS_APPEND,
		.size           = SZ_2M,
		.mask_flags     = 0,
	},
	{
		.name           = "filesystem",
		.offset         = MTDPART_OFS_APPEND,
		.size           = MTDPART_SIZ_FULL,
		.mask_flags     = 0,
	},
};

static struct physmap_flash_data da850_evm_norflash_data = {
	.width		= 2,
	.parts		= da850_evm_norflash_partition,
	.nr_parts	= ARRAY_SIZE(da850_evm_norflash_partition),
};

static struct resource da850_evm_norflash_resource[] = {
	{
		.start	= DA8XX_AEMIF_CS2_BASE,
		.end	= DA8XX_AEMIF_CS2_BASE + SZ_32M - 1,
		.flags	= IORESOURCE_MEM,
	},
};

static struct platform_device da850_evm_norflash_device = {
	.name		= "physmap-flash",
	.id		= 0,
	.dev		= {
		.platform_data  = &da850_evm_norflash_data,
	},
	.num_resources	= 1,
	.resource	= da850_evm_norflash_resource,
};

static struct davinci_pm_config da850_pm_pdata = {
	.sleepcount = 128,
};

static struct platform_device da850_pm_device = {
	.name           = "pm-davinci",
	.dev = {
		.platform_data	= &da850_pm_pdata,
	},
	.id             = -1,
};

/* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash
 * (128K blocks). It may be used instead of the (default) SPI flash
 * to boot, using TI's tools to install the secondary boot loader
 * (UBL) and U-Boot.
 */
struct mtd_partition da850_evm_nandflash_partition[] = {
	{
		.name		= "u-boot env",
		.offset		= 0,
		.size		= SZ_128K,
		.mask_flags	= MTD_WRITEABLE,
	 },
	{
		.name		= "UBL",
		.offset		= MTDPART_OFS_APPEND,
		.size		= SZ_128K,
		.mask_flags	= MTD_WRITEABLE,
	},
	{
		.name		= "u-boot",
		.offset		= MTDPART_OFS_APPEND,
		.size		= 4 * SZ_128K,
		.mask_flags	= MTD_WRITEABLE,
	},
	{
		.name		= "kernel",
		.offset		= 0x200000,
		.size		= SZ_2M,
		.mask_flags	= 0,
	},
	{
		.name		= "filesystem",
		.offset		= MTDPART_OFS_APPEND,
		.size		= MTDPART_SIZ_FULL,
		.mask_flags	= 0,
	},
};

static struct davinci_nand_pdata da850_evm_nandflash_data = {
	.parts		= da850_evm_nandflash_partition,
	.nr_parts	= ARRAY_SIZE(da850_evm_nandflash_partition),
	.ecc_mode	= NAND_ECC_HW,
	.ecc_bits	= 4,
	.options	= NAND_USE_FLASH_BBT,
};

static struct resource da850_evm_nandflash_resource[] = {
	{
		.start	= DA8XX_AEMIF_CS3_BASE,
		.end	= DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
		.flags	= IORESOURCE_MEM,
	},
	{
		.start	= DA8XX_AEMIF_CTL_BASE,
		.end	= DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
		.flags	= IORESOURCE_MEM,
	},
};

static struct platform_device da850_evm_nandflash_device = {
	.name		= "davinci_nand",
	.id		= 1,
	.dev		= {
		.platform_data	= &da850_evm_nandflash_data,
	},
	.num_resources	= ARRAY_SIZE(da850_evm_nandflash_resource),
	.resource	= da850_evm_nandflash_resource,
};

static struct platform_device *da850_evm_devices[] __initdata = {
	&da850_evm_nandflash_device,
	&da850_evm_norflash_device,
};

#define DA8XX_AEMIF_CE2CFG_OFFSET	0x10
#define DA8XX_AEMIF_ASIZE_16BIT		0x1

static void __init da850_evm_init_nor(void)
{
	void __iomem *aemif_addr;

	aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K);

	/* Configure data bus width of CS2 to 16 bit */
	writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) |
		DA8XX_AEMIF_ASIZE_16BIT,
		aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET);

	iounmap(aemif_addr);
}

static u32 ui_card_detected;

#if defined(CONFIG_MMC_DAVINCI) || \
    defined(CONFIG_MMC_DAVINCI_MODULE)
#define HAS_MMC 1
#else
#define HAS_MMC 0
#endif

static __init void da850_evm_setup_nor_nand(void)
{
	int ret = 0;

	if (ui_card_detected & !HAS_MMC) {
		ret = da8xx_pinmux_setup(da850_nand_pins);
		if (ret)
			pr_warning("da850_evm_init: nand mux setup failed: "
					"%d\n", ret);

		ret = da8xx_pinmux_setup(da850_nor_pins);
		if (ret)
			pr_warning("da850_evm_init: nor mux setup failed: %d\n",
				ret);

		da850_evm_init_nor();

		platform_add_devices(da850_evm_devices,
					ARRAY_SIZE(da850_evm_devices));
	}
}

#ifdef CONFIG_DA850_UI_RMII
static inline void da850_evm_setup_emac_rmii(int rmii_sel)
{
	struct davinci_soc_info *soc_info = &davinci_soc_info;

	soc_info->emac_pdata->rmii_en = 1;
	gpio_set_value(rmii_sel, 0);
}
#else
static inline void da850_evm_setup_emac_rmii(int rmii_sel) { }
#endif

static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
						unsigned ngpio, void *c)
{
	int sel_a, sel_b, sel_c, ret;

	sel_a = gpio + 7;
	sel_b = gpio + 6;
	sel_c = gpio + 5;

	ret = gpio_request(sel_a, "sel_a");
	if (ret) {
		pr_warning("Cannot open UI expander pin %d\n", sel_a);
		goto exp_setup_sela_fail;
	}

	ret = gpio_request(sel_b, "sel_b");
	if (ret) {
		pr_warning("Cannot open UI expander pin %d\n", sel_b);
		goto exp_setup_selb_fail;
	}

	ret = gpio_request(sel_c, "sel_c");
	if (ret) {
		pr_warning("Cannot open UI expander pin %d\n", sel_c);
		goto exp_setup_selc_fail;
	}

	/* deselect all functionalities */
	gpio_direction_output(sel_a, 1);
	gpio_direction_output(sel_b, 1);
	gpio_direction_output(sel_c, 1);

	ui_card_detected = 1;
	pr_info("DA850/OMAP-L138 EVM UI card detected\n");

	da850_evm_setup_nor_nand();

	da850_evm_setup_emac_rmii(sel_a);

	return 0;

exp_setup_selc_fail:
	gpio_free(sel_b);
exp_setup_selb_fail:
	gpio_free(sel_a);
exp_setup_sela_fail:
	return ret;
}

static int da850_evm_ui_expander_teardown(struct i2c_client *client,
					unsigned gpio, unsigned ngpio, void *c)
{
	/* deselect all functionalities */
	gpio_set_value(gpio + 5, 1);
	gpio_set_value(gpio + 6, 1);
	gpio_set_value(gpio + 7, 1);

	gpio_free(gpio + 5);
	gpio_free(gpio + 6);
	gpio_free(gpio + 7);

	return 0;
}

static struct pca953x_platform_data da850_evm_ui_expander_info = {
	.gpio_base	= DAVINCI_N_GPIO,
	.setup		= da850_evm_ui_expander_setup,
	.teardown	= da850_evm_ui_expander_teardown,
};

static struct i2c_board_info __initdata da850_evm_i2c_devices[] = {
	{
		I2C_BOARD_INFO("tlv320aic3x", 0x18),
	},
	{
		I2C_BOARD_INFO("tca6416", 0x20),
		.platform_data = &da850_evm_ui_expander_info,
	},
};

static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = {
	.bus_freq	= 100,	/* kHz */
	.bus_delay	= 0,	/* usec */
};

static struct davinci_uart_config da850_evm_uart_config __initdata = {
	.enabled_uarts = 0x7,
};

/* davinci da850 evm audio machine driver */
static u8 da850_iis_serializer_direction[] = {
	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,
	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,
	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,	TX_MODE,
	RX_MODE,	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,
};

static struct snd_platform_data da850_evm_snd_data = {
	.tx_dma_offset	= 0x2000,
	.rx_dma_offset	= 0x2000,
	.op_mode	= DAVINCI_MCASP_IIS_MODE,
	.num_serializer	= ARRAY_SIZE(da850_iis_serializer_direction),
	.tdm_slots	= 2,
	.serial_dir	= da850_iis_serializer_direction,
	.eventq_no	= EVENTQ_1,
	.version	= MCASP_VERSION_2,
	.txnumevt	= 1,
	.rxnumevt	= 1,
};

static int da850_evm_mmc_get_ro(int index)
{
	return gpio_get_value(DA850_MMCSD_WP_PIN);
}

static int da850_evm_mmc_get_cd(int index)
{
	return !gpio_get_value(DA850_MMCSD_CD_PIN);
}

static struct davinci_mmc_config da850_mmc_config = {
	.get_ro		= da850_evm_mmc_get_ro,
	.get_cd		= da850_evm_mmc_get_cd,
	.wires		= 4,
	.max_freq	= 50000000,
	.caps		= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
	.version	= MMC_CTLR_VERSION_2,
};

static void da850_panel_power_ctrl(int val)
{
	/* lcd backlight */
	gpio_set_value(DA850_LCD_BL_PIN, val);

	/* lcd power */
	gpio_set_value(DA850_LCD_PWR_PIN, val);
}

static int da850_lcd_hw_init(void)
{
	int status;

	status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n");
	if (status < 0)
		return status;

	status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n");
	if (status < 0) {
		gpio_free(DA850_LCD_BL_PIN);
		return status;
	}

	gpio_direction_output(DA850_LCD_BL_PIN, 0);
	gpio_direction_output(DA850_LCD_PWR_PIN, 0);

	/* Switch off panel power and backlight */
	da850_panel_power_ctrl(0);

	/* Switch on panel power and backlight */
	da850_panel_power_ctrl(1);

	return 0;
}

/* TPS65070 voltage regulator support */

/* 3.3V */
struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
	{
		.supply = "usb0_vdda33",
	},
	{
		.supply = "usb1_vdda33",
	},
};

/* 3.3V or 1.8V */
struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
	{
		.supply = "dvdd3318_a",
	},
	{
		.supply = "dvdd3318_b",
	},
	{
		.supply = "dvdd3318_c",
	},
};

/* 1.2V */
struct regulator_consumer_supply tps65070_dcdc3_consumers[] = {
	{
		.supply = "cvdd",
	},
};

/* 1.8V LDO */
struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
	{
		.supply = "sata_vddr",
	},
	{
		.supply = "usb0_vdda18",
	},
	{
		.supply = "usb1_vdda18",
	},
	{
		.supply = "ddr_dvdd18",
	},
};

/* 1.2V LDO */
struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
	{
		.supply = "sata_vdd",
	},
	{
		.supply = "pll0_vdda",
	},
	{
		.supply = "pll1_vdda",
	},
	{
		.supply = "usbs_cvdd",
	},
	{
		.supply = "vddarnwa1",
	},
};

struct regulator_init_data tps65070_regulator_data[] = {
	/* dcdc1 */
	{
		.constraints = {
			.min_uV = 3150000,
			.max_uV = 3450000,
			.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
				REGULATOR_CHANGE_STATUS),
			.boot_on = 1,
		},
		.num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc1_consumers),
		.consumer_supplies = tps65070_dcdc1_consumers,
	},

	/* dcdc2 */
	{
		.constraints = {
			.min_uV = 1710000,
			.max_uV = 3450000,
			.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
				REGULATOR_CHANGE_STATUS),
			.boot_on = 1,
		},
		.num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers),
		.consumer_supplies = tps65070_dcdc2_consumers,
	},

	/* dcdc3 */
	{
		.constraints = {
			.min_uV = 950000,
			.max_uV = 1320000,
			.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
				REGULATOR_CHANGE_STATUS),
			.boot_on = 1,
		},
		.num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers),
		.consumer_supplies = tps65070_dcdc3_consumers,
	},

	/* ldo1 */
	{
		.constraints = {
			.min_uV = 1710000,
			.max_uV = 1890000,
			.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
				REGULATOR_CHANGE_STATUS),
			.boot_on = 1,
		},
		.num_consumer_supplies = ARRAY_SIZE(tps65070_ldo1_consumers),
		.consumer_supplies = tps65070_ldo1_consumers,
	},

	/* ldo2 */
	{
		.constraints = {
			.min_uV = 1140000,
			.max_uV = 1320000,
			.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
				REGULATOR_CHANGE_STATUS),
			.boot_on = 1,
		},
		.num_consumer_supplies = ARRAY_SIZE(tps65070_ldo2_consumers),
		.consumer_supplies = tps65070_ldo2_consumers,
	},
};

static struct i2c_board_info __initdata da850evm_tps65070_info[] = {
	{
		I2C_BOARD_INFO("tps6507x", 0x48),
		.platform_data = &tps65070_regulator_data[0],
	},
};

static int __init pmic_tps65070_init(void)
{
	return i2c_register_board_info(1, da850evm_tps65070_info,
					ARRAY_SIZE(da850evm_tps65070_info));
}

static const short da850_evm_lcdc_pins[] = {
	DA850_GPIO2_8, DA850_GPIO2_15,
	-1
};

static int __init da850_evm_config_emac(void)
{
	void __iomem *cfg_chip3_base;
	int ret;
	u32 val;
	struct davinci_soc_info *soc_info = &davinci_soc_info;
	u8 rmii_en = soc_info->emac_pdata->rmii_en;

	if (!machine_is_davinci_da850_evm())
		return 0;

	cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);

	val = __raw_readl(cfg_chip3_base);

	if (rmii_en) {
		val |= BIT(8);
		ret = da8xx_pinmux_setup(da850_rmii_pins);
		pr_info("EMAC: RMII PHY configured, MII PHY will not be"
							" functional\n");
	} else {
		val &= ~BIT(8);
		ret = da8xx_pinmux_setup(da850_cpgmac_pins);
		pr_info("EMAC: MII PHY configured, RMII PHY will not be"
							" functional\n");
	}

	if (ret)
		pr_warning("da850_evm_init: cpgmac/rmii mux setup failed: %d\n",
				ret);

	/* configure the CFGCHIP3 register for RMII or MII */
	__raw_writel(val, cfg_chip3_base);

	ret = davinci_cfg_reg(DA850_GPIO2_6);
	if (ret)
		pr_warning("da850_evm_init:GPIO(2,6) mux setup "
							"failed\n");

	ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en");
	if (ret) {
		pr_warning("Cannot open GPIO %d\n",
					DA850_MII_MDIO_CLKEN_PIN);
		return ret;
	}

	/* Enable/Disable MII MDIO clock */
	gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en);

	soc_info->emac_pdata->phy_mask = DA850_EVM_PHY_MASK;
	soc_info->emac_pdata->mdio_max_freq = DA850_EVM_MDIO_FREQUENCY;

	ret = da8xx_register_emac();
	if (ret)
		pr_warning("da850_evm_init: emac registration failed: %d\n",
				ret);

	return 0;
}
device_initcall(da850_evm_config_emac);

static __init void da850_evm_init(void)
{
	int ret;

	ret = pmic_tps65070_init();
	if (ret)
		pr_warning("da850_evm_init: TPS65070 PMIC init failed: %d\n",
				ret);

	ret = da8xx_register_edma();
	if (ret)
		pr_warning("da850_evm_init: edma registration failed: %d\n",
				ret);

	ret = da8xx_pinmux_setup(da850_i2c0_pins);
	if (ret)
		pr_warning("da850_evm_init: i2c0 mux setup failed: %d\n",
				ret);

	ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata);
	if (ret)
		pr_warning("da850_evm_init: i2c0 registration failed: %d\n",
				ret);


	ret = da8xx_register_watchdog();
	if (ret)
		pr_warning("da830_evm_init: watchdog registration failed: %d\n",
				ret);

	if (HAS_MMC) {
		ret = da8xx_pinmux_setup(da850_mmcsd0_pins);
		if (ret)
			pr_warning("da850_evm_init: mmcsd0 mux setup failed:"
					" %d\n", ret);

		ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n");
		if (ret)
			pr_warning("da850_evm_init: can not open GPIO %d\n",
					DA850_MMCSD_CD_PIN);
		gpio_direction_input(DA850_MMCSD_CD_PIN);

		ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n");
		if (ret)
			pr_warning("da850_evm_init: can not open GPIO %d\n",
					DA850_MMCSD_WP_PIN);
		gpio_direction_input(DA850_MMCSD_WP_PIN);

		ret = da8xx_register_mmcsd0(&da850_mmc_config);
		if (ret)
			pr_warning("da850_evm_init: mmcsd0 registration failed:"
					" %d\n", ret);
	}

	davinci_serial_init(&da850_evm_uart_config);

	i2c_register_board_info(1, da850_evm_i2c_devices,
			ARRAY_SIZE(da850_evm_i2c_devices));

	/*
	 * shut down uart 0 and 1; they are not used on the board and
	 * accessing them causes endless "too much work in irq53" messages
	 * with arago fs
	 */
	__raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
	__raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);

	ret = da8xx_pinmux_setup(da850_mcasp_pins);
	if (ret)
		pr_warning("da850_evm_init: mcasp mux setup failed: %d\n",
				ret);

	da8xx_register_mcasp(0, &da850_evm_snd_data);

	ret = da8xx_pinmux_setup(da850_lcdcntl_pins);
	if (ret)
		pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n",
				ret);

	/* Handle board specific muxing for LCD here */
	ret = da8xx_pinmux_setup(da850_evm_lcdc_pins);
	if (ret)
		pr_warning("da850_evm_init: evm specific lcd mux setup "
				"failed: %d\n",	ret);

	ret = da850_lcd_hw_init();
	if (ret)
		pr_warning("da850_evm_init: lcd initialization failed: %d\n",
				ret);

	sharp_lk043t1dg01_pdata.panel_power_ctrl = da850_panel_power_ctrl,
	ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata);
	if (ret)
		pr_warning("da850_evm_init: lcdc registration failed: %d\n",
				ret);

	ret = da8xx_register_rtc();
	if (ret)
		pr_warning("da850_evm_init: rtc setup failed: %d\n", ret);

	ret = da850_register_cpufreq();
	if (ret)
		pr_warning("da850_evm_init: cpufreq registration failed: %d\n",
				ret);

	ret = da8xx_register_cpuidle();
	if (ret)
		pr_warning("da850_evm_init: cpuidle registration failed: %d\n",
				ret);

	ret = da850_register_pm(&da850_pm_device);
	if (ret)
		pr_warning("da850_evm_init: suspend registration failed: %d\n",
				ret);
}

#ifdef CONFIG_SERIAL_8250_CONSOLE
static int __init da850_evm_console_init(void)
{
	return add_preferred_console("ttyS", 2, "115200");
}
console_initcall(da850_evm_console_init);
#endif

static __init void da850_evm_irq_init(void)
{
	struct davinci_soc_info *soc_info = &davinci_soc_info;

	cp_intc_init((void __iomem *)DA8XX_CP_INTC_VIRT, DA850_N_CP_INTC_IRQ,
			soc_info->intc_irq_prios);
}

static void __init da850_evm_map_io(void)
{
	da850_init();
}

MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138 EVM")
	.phys_io	= IO_PHYS,
	.io_pg_offst	= (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
	.boot_params	= (DA8XX_DDR_BASE + 0x100),
	.map_io		= da850_evm_map_io,
	.init_irq	= da850_evm_irq_init,
	.timer		= &davinci_timer,
	.init_machine	= da850_evm_init,
MACHINE_END
Commit	Line	Data
0fbc5592 SR	1	/*
	2	* TI DA850/OMAP-L138 EVM board
	3	*
	4	* Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
	5	*
	6	* Derived from: arch/arm/mach-davinci/board-da830-evm.c
	7	* Original Copyrights follow:
	8	*
	9	* 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
	10	* the terms of the GNU General Public License version 2. This program
	11	* is licensed "as is" without any warranty of any kind, whether express
	12	* or implied.
	13	*/
	14	#include <linux/kernel.h>
0fbc5592 SR	15	#include <linux/init.h>
	16	#include <linux/console.h>
	17	#include <linux/i2c.h>
	18	#include <linux/i2c/at24.h>
75e2ea64	19	#include <linux/i2c/pca953x.h>
5cbdf276	20	#include <linux/gpio.h>
38beb929 SR	21	#include <linux/platform_device.h>
	22	#include <linux/mtd/mtd.h>
	23	#include <linux/mtd/nand.h>
	24	#include <linux/mtd/partitions.h>
7c5ec609	25	#include <linux/mtd/physmap.h>
a9eb1f67	26	#include <linux/regulator/machine.h>
0fbc5592 SR	27
	28	#include <asm/mach-types.h>
	29	#include <asm/mach/arch.h>
	30
0fbc5592 SR	31	#include <mach/cp_intc.h>
0fbc5592 SR	32	#include <mach/da8xx.h>
38beb929	33	#include <mach/nand.h>
7761ef67	34	#include <mach/mux.h>
0fbc5592	35
5a4b1315 SR	36	#define DA850_EVM_PHY_MASK 0x1
	37	#define DA850_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
	38
7761ef67	39	#define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8)
5cbdf276	40	#define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15)
5cbdf276	41
700691f2 SR	42	#define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0)
	43	#define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1)
	44
2206771c C	45	#define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6)
2206771c C	46
7c5ec609 SR	47	static struct mtd_partition da850_evm_norflash_partition[] = {
7c5ec609 SR	48	{
e2abd5a2	49	.name = "bootloaders + env",
7c5ec609	50	.offset = 0,
e2abd5a2 SR	51	.size = SZ_512K,
	52	.mask_flags = MTD_WRITEABLE,
	53	},
	54	{
	55	.name = "kernel",
	56	.offset = MTDPART_OFS_APPEND,
	57	.size = SZ_2M,
	58	.mask_flags = 0,
	59	},
	60	{
	61	.name = "filesystem",
	62	.offset = MTDPART_OFS_APPEND,
7c5ec609 SR	63	.size = MTDPART_SIZ_FULL,
	64	.mask_flags = 0,
	65	},
	66	};
	67
	68	static struct physmap_flash_data da850_evm_norflash_data = {
	69	.width = 2,
	70	.parts = da850_evm_norflash_partition,
	71	.nr_parts = ARRAY_SIZE(da850_evm_norflash_partition),
	72	};
	73
	74	static struct resource da850_evm_norflash_resource[] = {
	75	{
	76	.start = DA8XX_AEMIF_CS2_BASE,
	77	.end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1,
	78	.flags = IORESOURCE_MEM,
	79	},
	80	};
	81
	82	static struct platform_device da850_evm_norflash_device = {
	83	.name = "physmap-flash",
	84	.id = 0,
	85	.dev = {
	86	.platform_data = &da850_evm_norflash_data,
	87	},
	88	.num_resources = 1,
	89	.resource = da850_evm_norflash_resource,
	90	};
	91
63534443 SN	92	static struct davinci_pm_config da850_pm_pdata = {
	93	.sleepcount = 128,
	94	};
	95
	96	static struct platform_device da850_pm_device = {
	97	.name = "pm-davinci",
	98	.dev = {
	99	.platform_data = &da850_pm_pdata,
	100	},
	101	.id = -1,
	102	};
	103
38beb929 SR	104	/* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash
	105	* (128K blocks). It may be used instead of the (default) SPI flash
	106	* to boot, using TI's tools to install the secondary boot loader
	107	* (UBL) and U-Boot.
	108	*/
	109	struct mtd_partition da850_evm_nandflash_partition[] = {
	110	{
	111	.name = "u-boot env",
	112	.offset = 0,
	113	.size = SZ_128K,
	114	.mask_flags = MTD_WRITEABLE,
	115	},
	116	{
	117	.name = "UBL",
	118	.offset = MTDPART_OFS_APPEND,
	119	.size = SZ_128K,
	120	.mask_flags = MTD_WRITEABLE,
	121	},
	122	{
	123	.name = "u-boot",
	124	.offset = MTDPART_OFS_APPEND,
	125	.size = 4 * SZ_128K,
	126	.mask_flags = MTD_WRITEABLE,
	127	},
	128	{
	129	.name = "kernel",
	130	.offset = 0x200000,
	131	.size = SZ_2M,
	132	.mask_flags = 0,
	133	},
	134	{
	135	.name = "filesystem",
	136	.offset = MTDPART_OFS_APPEND,
	137	.size = MTDPART_SIZ_FULL,
	138	.mask_flags = 0,
	139	},
	140	};
	141
	142	static struct davinci_nand_pdata da850_evm_nandflash_data = {
	143	.parts = da850_evm_nandflash_partition,
	144	.nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition),
	145	.ecc_mode = NAND_ECC_HW,
fc42e335	146	.ecc_bits = 4,
38beb929 SR	147	.options = NAND_USE_FLASH_BBT,
	148	};
	149
	150	static struct resource da850_evm_nandflash_resource[] = {
	151	{
	152	.start = DA8XX_AEMIF_CS3_BASE,
	153	.end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
	154	.flags = IORESOURCE_MEM,
	155	},
	156	{
	157	.start = DA8XX_AEMIF_CTL_BASE,
	158	.end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
	159	.flags = IORESOURCE_MEM,
	160	},
	161	};
	162
	163	static struct platform_device da850_evm_nandflash_device = {
	164	.name = "davinci_nand",
	165	.id = 1,
	166	.dev = {
	167	.platform_data = &da850_evm_nandflash_data,
	168	},
	169	.num_resources = ARRAY_SIZE(da850_evm_nandflash_resource),
	170	.resource = da850_evm_nandflash_resource,
	171	};
	172
039c5ee3 SR	173	static struct platform_device *da850_evm_devices[] __initdata = {
	174	&da850_evm_nandflash_device,
	175	&da850_evm_norflash_device,
	176	};
	177
	178	#define DA8XX_AEMIF_CE2CFG_OFFSET 0x10
	179	#define DA8XX_AEMIF_ASIZE_16BIT 0x1
	180
	181	static void __init da850_evm_init_nor(void)
	182	{
	183	void __iomem *aemif_addr;
	184
	185	aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K);
	186
	187	/* Configure data bus width of CS2 to 16 bit */
	188	writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) \|
	189	DA8XX_AEMIF_ASIZE_16BIT,
	190	aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET);
	191
	192	iounmap(aemif_addr);
	193	}
	194
75e2ea64	195	static u32 ui_card_detected;
039c5ee3 SR	196
	197	#if defined(CONFIG_MMC_DAVINCI) \|\| \
	198	defined(CONFIG_MMC_DAVINCI_MODULE)
	199	#define HAS_MMC 1
	200	#else
	201	#define HAS_MMC 0
	202	#endif
	203
1ef203c3	204	static __init void da850_evm_setup_nor_nand(void)
039c5ee3 SR	205	{
	206	int ret = 0;
	207
	208	if (ui_card_detected & !HAS_MMC) {
	209	ret = da8xx_pinmux_setup(da850_nand_pins);
	210	if (ret)
	211	pr_warning("da850_evm_init: nand mux setup failed: "
	212	"%d\n", ret);
	213
	214	ret = da8xx_pinmux_setup(da850_nor_pins);
	215	if (ret)
	216	pr_warning("da850_evm_init: nor mux setup failed: %d\n",
	217	ret);
	218
	219	da850_evm_init_nor();
	220
	221	platform_add_devices(da850_evm_devices,
	222	ARRAY_SIZE(da850_evm_devices));
	223	}
	224	}
75e2ea64	225
bae10587 SN	226	#ifdef CONFIG_DA850_UI_RMII
	227	static inline void da850_evm_setup_emac_rmii(int rmii_sel)
	228	{
	229	struct davinci_soc_info *soc_info = &davinci_soc_info;
	230
	231	soc_info->emac_pdata->rmii_en = 1;
	232	gpio_set_value(rmii_sel, 0);
	233	}
	234	#else
	235	static inline void da850_evm_setup_emac_rmii(int rmii_sel) { }
	236	#endif
	237
75e2ea64 C	238	static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
	239	unsigned ngpio, void *c)
	240	{
	241	int sel_a, sel_b, sel_c, ret;
	242
	243	sel_a = gpio + 7;
	244	sel_b = gpio + 6;
	245	sel_c = gpio + 5;
	246
	247	ret = gpio_request(sel_a, "sel_a");
	248	if (ret) {
	249	pr_warning("Cannot open UI expander pin %d\n", sel_a);
	250	goto exp_setup_sela_fail;
	251	}
	252
	253	ret = gpio_request(sel_b, "sel_b");
	254	if (ret) {
	255	pr_warning("Cannot open UI expander pin %d\n", sel_b);
	256	goto exp_setup_selb_fail;
	257	}
	258
	259	ret = gpio_request(sel_c, "sel_c");
	260	if (ret) {
	261	pr_warning("Cannot open UI expander pin %d\n", sel_c);
	262	goto exp_setup_selc_fail;
	263	}
	264
	265	/* deselect all functionalities */
	266	gpio_direction_output(sel_a, 1);
	267	gpio_direction_output(sel_b, 1);
	268	gpio_direction_output(sel_c, 1);
	269
	270	ui_card_detected = 1;
	271	pr_info("DA850/OMAP-L138 EVM UI card detected\n");
	272
	273	da850_evm_setup_nor_nand();
	274
bae10587	275	da850_evm_setup_emac_rmii(sel_a);
2206771c	276
75e2ea64 C	277	return 0;
	278
	279	exp_setup_selc_fail:
	280	gpio_free(sel_b);
	281	exp_setup_selb_fail:
	282	gpio_free(sel_a);
	283	exp_setup_sela_fail:
	284	return ret;
	285	}
	286
	287	static int da850_evm_ui_expander_teardown(struct i2c_client *client,
	288	unsigned gpio, unsigned ngpio, void *c)
	289	{
	290	/* deselect all functionalities */
	291	gpio_set_value(gpio + 5, 1);
	292	gpio_set_value(gpio + 6, 1);
	293	gpio_set_value(gpio + 7, 1);
	294
	295	gpio_free(gpio + 5);
	296	gpio_free(gpio + 6);
	297	gpio_free(gpio + 7);
	298
	299	return 0;
	300	}
	301
	302	static struct pca953x_platform_data da850_evm_ui_expander_info = {
	303	.gpio_base = DAVINCI_N_GPIO,
	304	.setup = da850_evm_ui_expander_setup,
	305	.teardown = da850_evm_ui_expander_teardown,
	306	};
	307
1a7ff8ff C	308	static struct i2c_board_info __initdata da850_evm_i2c_devices[] = {
	309	{
	310	I2C_BOARD_INFO("tlv320aic3x", 0x18),
75e2ea64 C	311	},
	312	{
	313	I2C_BOARD_INFO("tca6416", 0x20),
	314	.platform_data = &da850_evm_ui_expander_info,
	315	},
1a7ff8ff C	316	};
1a7ff8ff C	317
0fbc5592 SR	318	static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = {
	319	.bus_freq = 100, /* kHz */
	320	.bus_delay = 0, /* usec */
	321	};
	322
	323	static struct davinci_uart_config da850_evm_uart_config __initdata = {
	324	.enabled_uarts = 0x7,
	325	};
	326
491214e1 C	327	/* davinci da850 evm audio machine driver */
	328	static u8 da850_iis_serializer_direction[] = {
	329	INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
	330	INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
	331	INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE,
	332	RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
	333	};
	334
	335	static struct snd_platform_data da850_evm_snd_data = {
	336	.tx_dma_offset = 0x2000,
	337	.rx_dma_offset = 0x2000,
	338	.op_mode = DAVINCI_MCASP_IIS_MODE,
	339	.num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
	340	.tdm_slots = 2,
	341	.serial_dir = da850_iis_serializer_direction,
	342	.eventq_no = EVENTQ_1,
	343	.version = MCASP_VERSION_2,
	344	.txnumevt = 1,
	345	.rxnumevt = 1,
	346	};
	347
700691f2 SR	348	static int da850_evm_mmc_get_ro(int index)
	349	{
	350	return gpio_get_value(DA850_MMCSD_WP_PIN);
	351	}
	352
	353	static int da850_evm_mmc_get_cd(int index)
	354	{
	355	return !gpio_get_value(DA850_MMCSD_CD_PIN);
	356	}
	357
	358	static struct davinci_mmc_config da850_mmc_config = {
	359	.get_ro = da850_evm_mmc_get_ro,
	360	.get_cd = da850_evm_mmc_get_cd,
	361	.wires = 4,
0046d0bf C	362	.max_freq = 50000000,
0046d0bf C	363	.caps = MMC_CAP_MMC_HIGHSPEED \| MMC_CAP_SD_HIGHSPEED,
700691f2 SR	364	.version = MMC_CTLR_VERSION_2,
	365	};
	366
d52f235f C	367	static void da850_panel_power_ctrl(int val)
	368	{
	369	/* lcd backlight */
	370	gpio_set_value(DA850_LCD_BL_PIN, val);
	371
	372	/* lcd power */
	373	gpio_set_value(DA850_LCD_PWR_PIN, val);
	374	}
	375
5cbdf276 SR	376	static int da850_lcd_hw_init(void)
	377	{
	378	int status;
	379
	380	status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n");
	381	if (status < 0)
	382	return status;
	383
	384	status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n");
	385	if (status < 0) {
	386	gpio_free(DA850_LCD_BL_PIN);
	387	return status;
	388	}
	389
	390	gpio_direction_output(DA850_LCD_BL_PIN, 0);
	391	gpio_direction_output(DA850_LCD_PWR_PIN, 0);
	392
d52f235f C	393	/* Switch off panel power and backlight */
d52f235f C	394	da850_panel_power_ctrl(0);
5cbdf276	395
d52f235f C	396	/* Switch on panel power and backlight */
d52f235f C	397	da850_panel_power_ctrl(1);
5cbdf276 SR	398
	399	return 0;
	400	}
491214e1	401
a9eb1f67 SN	402	/* TPS65070 voltage regulator support */
	403
	404	/* 3.3V */
	405	struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
	406	{
	407	.supply = "usb0_vdda33",
	408	},
	409	{
	410	.supply = "usb1_vdda33",
	411	},
	412	};
	413
	414	/* 3.3V or 1.8V */
	415	struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
	416	{
	417	.supply = "dvdd3318_a",
	418	},
	419	{
	420	.supply = "dvdd3318_b",
	421	},
	422	{
	423	.supply = "dvdd3318_c",
	424	},
	425	};
	426
	427	/* 1.2V */
	428	struct regulator_consumer_supply tps65070_dcdc3_consumers[] = {
	429	{
	430	.supply = "cvdd",
	431	},
	432	};
	433
	434	/* 1.8V LDO */
	435	struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
	436	{
	437	.supply = "sata_vddr",
	438	},
	439	{
	440	.supply = "usb0_vdda18",
	441	},
	442	{
	443	.supply = "usb1_vdda18",
	444	},
	445	{
	446	.supply = "ddr_dvdd18",
	447	},
	448	};
	449
	450	/* 1.2V LDO */
	451	struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
	452	{
	453	.supply = "sata_vdd",
	454	},
	455	{
	456	.supply = "pll0_vdda",
	457	},
	458	{
	459	.supply = "pll1_vdda",
	460	},
	461	{
	462	.supply = "usbs_cvdd",
	463	},
	464	{
	465	.supply = "vddarnwa1",
466	},
467	};
468
469	struct regulator_init_data tps65070_regulator_data[] = {
470	/* dcdc1 */
471	{
472	.constraints = {
473	.min_uV = 3150000,
474	.max_uV = 3450000,
475	.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE \|
476	REGULATOR_CHANGE_STATUS),
477	.boot_on = 1,
478	},
479	.num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc1_consumers),
480	.consumer_supplies = tps65070_dcdc1_consumers,
481	},
482
483	/* dcdc2 */
484	{
485	.constraints = {
486	.min_uV = 1710000,
487	.max_uV = 3450000,
488	.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE \|
489	REGULATOR_CHANGE_STATUS),
490	.boot_on = 1,
491	},
492	.num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers),
493	.consumer_supplies = tps65070_dcdc2_consumers,
494	},
495
496	/* dcdc3 */
497	{
498	.constraints = {
499	.min_uV = 950000,
500	.max_uV = 1320000,
501	.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE \|
502	REGULATOR_CHANGE_STATUS),
503	.boot_on = 1,
504	},
505	.num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers),
506	.consumer_supplies = tps65070_dcdc3_consumers,
507	},
508
509	/* ldo1 */
510	{
511	.constraints = {
512	.min_uV = 1710000,
513	.max_uV = 1890000,
514	.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE \|
515	REGULATOR_CHANGE_STATUS),
516	.boot_on = 1,
517	},
518	.num_consumer_supplies = ARRAY_SIZE(tps65070_ldo1_consumers),
519	.consumer_supplies = tps65070_ldo1_consumers,
520	},
521
522	/* ldo2 */
523	{
524	.constraints = {
525	.min_uV = 1140000,
526	.max_uV = 1320000,
527	.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE \|
528	REGULATOR_CHANGE_STATUS),
529	.boot_on = 1,
530	},
531	.num_consumer_supplies = ARRAY_SIZE(tps65070_ldo2_consumers),
532	.consumer_supplies = tps65070_ldo2_consumers,
533	},
534	};
535
536	static struct i2c_board_info __initdata da850evm_tps65070_info[] = {
537	{
538	I2C_BOARD_INFO("tps6507x", 0x48),
539	.platform_data = &tps65070_regulator_data[0],
540	},
541	};
542
543	static int __init pmic_tps65070_init(void)
544	{
545	return i2c_register_board_info(1, da850evm_tps65070_info,
546	ARRAY_SIZE(da850evm_tps65070_info));
547	}
548
7761ef67 SR	549	static const short da850_evm_lcdc_pins[] = {
	550	DA850_GPIO2_8, DA850_GPIO2_15,
	551	-1
	552	};
	553
bae10587	554	static int __init da850_evm_config_emac(void)
2206771c C	555	{
	556	void __iomem *cfg_chip3_base;
	557	int ret;
	558	u32 val;
bae10587 SN	559	struct davinci_soc_info *soc_info = &davinci_soc_info;
	560	u8 rmii_en = soc_info->emac_pdata->rmii_en;
	561
	562	if (!machine_is_davinci_da850_evm())
	563	return 0;
2206771c	564
d2de0582	565	cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
2206771c	566
2206771c	567	val = __raw_readl(cfg_chip3_base);
17fadd9a SN	568
17fadd9a SN	569	if (rmii_en) {
2206771c	570	val \|= BIT(8);
17fadd9a SN	571	ret = da8xx_pinmux_setup(da850_rmii_pins);
	572	pr_info("EMAC: RMII PHY configured, MII PHY will not be"
	573	" functional\n");
	574	} else {
2206771c	575	val &= ~BIT(8);
2206771c	576	ret = da8xx_pinmux_setup(da850_cpgmac_pins);
17fadd9a SN	577	pr_info("EMAC: MII PHY configured, RMII PHY will not be"
	578	" functional\n");
	579	}
	580
2206771c C	581	if (ret)
	582	pr_warning("da850_evm_init: cpgmac/rmii mux setup failed: %d\n",
	583	ret);
	584
17fadd9a SN	585	/* configure the CFGCHIP3 register for RMII or MII */
	586	__raw_writel(val, cfg_chip3_base);
	587
2206771c C	588	ret = davinci_cfg_reg(DA850_GPIO2_6);
	589	if (ret)
	590	pr_warning("da850_evm_init:GPIO(2,6) mux setup "
	591	"failed\n");
	592
	593	ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en");
	594	if (ret) {
	595	pr_warning("Cannot open GPIO %d\n",
	596	DA850_MII_MDIO_CLKEN_PIN);
	597	return ret;
	598	}
	599
17fadd9a SN	600	/* Enable/Disable MII MDIO clock */
17fadd9a SN	601	gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en);
2206771c	602
bae10587 SN	603	soc_info->emac_pdata->phy_mask = DA850_EVM_PHY_MASK;
	604	soc_info->emac_pdata->mdio_max_freq = DA850_EVM_MDIO_FREQUENCY;
	605
	606	ret = da8xx_register_emac();
	607	if (ret)
	608	pr_warning("da850_evm_init: emac registration failed: %d\n",
	609	ret);
	610
2206771c C	611	return 0;
2206771c C	612	}
bae10587	613	device_initcall(da850_evm_config_emac);
2206771c	614
0fbc5592 SR	615	static __init void da850_evm_init(void)
	616	{
	617	int ret;
	618
a9eb1f67 SN	619	ret = pmic_tps65070_init();
	620	if (ret)
	621	pr_warning("da850_evm_init: TPS65070 PMIC init failed: %d\n",
	622	ret);
	623
0fbc5592 SR	624	ret = da8xx_register_edma();
	625	if (ret)
	626	pr_warning("da850_evm_init: edma registration failed: %d\n",
	627	ret);
	628
	629	ret = da8xx_pinmux_setup(da850_i2c0_pins);
	630	if (ret)
	631	pr_warning("da850_evm_init: i2c0 mux setup failed: %d\n",
	632	ret);
	633
	634	ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata);
	635	if (ret)
	636	pr_warning("da850_evm_init: i2c0 registration failed: %d\n",
	637	ret);
	638
5a4b1315	639
0fbc5592 SR	640	ret = da8xx_register_watchdog();
	641	if (ret)
	642	pr_warning("da830_evm_init: watchdog registration failed: %d\n",
	643	ret);
	644
820c4fe3	645	if (HAS_MMC) {
820c4fe3 SR	646	ret = da8xx_pinmux_setup(da850_mmcsd0_pins);
	647	if (ret)
	648	pr_warning("da850_evm_init: mmcsd0 mux setup failed:"
	649	" %d\n", ret);
	650
	651	ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n");
	652	if (ret)
	653	pr_warning("da850_evm_init: can not open GPIO %d\n",
	654	DA850_MMCSD_CD_PIN);
	655	gpio_direction_input(DA850_MMCSD_CD_PIN);
	656
	657	ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n");
	658	if (ret)
	659	pr_warning("da850_evm_init: can not open GPIO %d\n",
	660	DA850_MMCSD_WP_PIN);
	661	gpio_direction_input(DA850_MMCSD_WP_PIN);
	662
	663	ret = da8xx_register_mmcsd0(&da850_mmc_config);
	664	if (ret)
	665	pr_warning("da850_evm_init: mmcsd0 registration failed:"
	666	" %d\n", ret);
	667	}
700691f2	668
0fbc5592 SR	669	davinci_serial_init(&da850_evm_uart_config);
0fbc5592 SR	670
1a7ff8ff C	671	i2c_register_board_info(1, da850_evm_i2c_devices,
	672	ARRAY_SIZE(da850_evm_i2c_devices));
	673
0fbc5592 SR	674	/*
	675	* shut down uart 0 and 1; they are not used on the board and
	676	* accessing them causes endless "too much work in irq53" messages
	677	* with arago fs
	678	*/
	679	__raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
	680	__raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
491214e1 C	681
	682	ret = da8xx_pinmux_setup(da850_mcasp_pins);
	683	if (ret)
	684	pr_warning("da850_evm_init: mcasp mux setup failed: %d\n",
	685	ret);
	686
b8864aa4	687	da8xx_register_mcasp(0, &da850_evm_snd_data);
5cbdf276 SR	688
	689	ret = da8xx_pinmux_setup(da850_lcdcntl_pins);
	690	if (ret)
	691	pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n",
	692	ret);
	693
7761ef67 SR	694	/* Handle board specific muxing for LCD here */
	695	ret = da8xx_pinmux_setup(da850_evm_lcdc_pins);
	696	if (ret)
	697	pr_warning("da850_evm_init: evm specific lcd mux setup "
	698	"failed: %d\n", ret);
	699
5cbdf276 SR	700	ret = da850_lcd_hw_init();
	701	if (ret)
	702	pr_warning("da850_evm_init: lcd initialization failed: %d\n",
	703	ret);
	704
d52f235f	705	sharp_lk043t1dg01_pdata.panel_power_ctrl = da850_panel_power_ctrl,
b9e6342b	706	ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata);
5cbdf276 SR	707	if (ret)
	708	pr_warning("da850_evm_init: lcdc registration failed: %d\n",
	709	ret);
c51df70b MG	710
	711	ret = da8xx_register_rtc();
	712	if (ret)
	713	pr_warning("da850_evm_init: rtc setup failed: %d\n", ret);
09dc2d45 SN	714
	715	ret = da850_register_cpufreq();
	716	if (ret)
	717	pr_warning("da850_evm_init: cpufreq registration failed: %d\n",
	718	ret);
5aeb15aa SN	719
	720	ret = da8xx_register_cpuidle();
	721	if (ret)
	722	pr_warning("da850_evm_init: cpuidle registration failed: %d\n",
	723	ret);
63534443 SN	724
	725	ret = da850_register_pm(&da850_pm_device);
	726	if (ret)
	727	pr_warning("da850_evm_init: suspend registration failed: %d\n",
	728	ret);
0fbc5592 SR	729	}
	730
	731	#ifdef CONFIG_SERIAL_8250_CONSOLE
	732	static int __init da850_evm_console_init(void)
	733	{
	734	return add_preferred_console("ttyS", 2, "115200");
	735	}
	736	console_initcall(da850_evm_console_init);
	737	#endif
	738
	739	static __init void da850_evm_irq_init(void)
	740	{
	741	struct davinci_soc_info *soc_info = &davinci_soc_info;
	742
	743	cp_intc_init((void __iomem *)DA8XX_CP_INTC_VIRT, DA850_N_CP_INTC_IRQ,
	744	soc_info->intc_irq_prios);
	745	}
	746
	747	static void __init da850_evm_map_io(void)
	748	{
	749	da850_init();
	750	}
	751
	752	MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138 EVM")
	753	.phys_io = IO_PHYS,
	754	.io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
	755	.boot_params = (DA8XX_DDR_BASE + 0x100),
	756	.map_io = da850_evm_map_io,
	757	.init_irq = da850_evm_irq_init,
	758	.timer = &davinci_timer,
	759	.init_machine = da850_evm_init,
	760	MACHINE_END