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1da177e4 LT |
1 | #ifndef ASMARM_DMA_MAPPING_H |
2 | #define ASMARM_DMA_MAPPING_H | |
3 | ||
4 | #ifdef __KERNEL__ | |
5 | ||
98ed7d4b | 6 | #include <linux/mm_types.h> |
dee9ba82 | 7 | #include <linux/scatterlist.h> |
f99d6034 | 8 | #include <linux/dma-attrs.h> |
24056f52 | 9 | #include <linux/dma-debug.h> |
1da177e4 | 10 | |
1fe53268 | 11 | #include <asm-generic/dma-coherent.h> |
98ed7d4b | 12 | #include <asm/memory.h> |
06e6295b | 13 | #include <asm/cacheflush.h> |
98ed7d4b | 14 | |
553ac788 | 15 | #define DMA_ERROR_CODE (~0) |
2dc6a016 | 16 | extern struct dma_map_ops arm_dma_ops; |
dd37e940 | 17 | extern struct dma_map_ops arm_coherent_dma_ops; |
2dc6a016 MS |
18 | |
19 | static inline struct dma_map_ops *get_dma_ops(struct device *dev) | |
20 | { | |
21 | if (dev && dev->archdata.dma_ops) | |
22 | return dev->archdata.dma_ops; | |
23 | return &arm_dma_ops; | |
24 | } | |
25 | ||
26 | static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops) | |
27 | { | |
28 | BUG_ON(!dev); | |
29 | dev->archdata.dma_ops = ops; | |
30 | } | |
31 | ||
32 | #include <asm-generic/dma-mapping-common.h> | |
33 | ||
34 | static inline int dma_set_mask(struct device *dev, u64 mask) | |
35 | { | |
36 | return get_dma_ops(dev)->set_dma_mask(dev, mask); | |
37 | } | |
553ac788 | 38 | |
9eedd963 RK |
39 | #ifdef __arch_page_to_dma |
40 | #error Please update to __arch_pfn_to_dma | |
41 | #endif | |
42 | ||
98ed7d4b | 43 | /* |
9eedd963 RK |
44 | * dma_to_pfn/pfn_to_dma/dma_to_virt/virt_to_dma are architecture private |
45 | * functions used internally by the DMA-mapping API to provide DMA | |
46 | * addresses. They must not be used by drivers. | |
98ed7d4b | 47 | */ |
9eedd963 RK |
48 | #ifndef __arch_pfn_to_dma |
49 | static inline dma_addr_t pfn_to_dma(struct device *dev, unsigned long pfn) | |
58edb515 | 50 | { |
9eedd963 | 51 | return (dma_addr_t)__pfn_to_bus(pfn); |
58edb515 | 52 | } |
98ed7d4b | 53 | |
9eedd963 | 54 | static inline unsigned long dma_to_pfn(struct device *dev, dma_addr_t addr) |
ef1baed8 | 55 | { |
9eedd963 | 56 | return __bus_to_pfn(addr); |
ef1baed8 RK |
57 | } |
58 | ||
98ed7d4b RK |
59 | static inline void *dma_to_virt(struct device *dev, dma_addr_t addr) |
60 | { | |
01f461a3 | 61 | return (void *)__bus_to_virt((unsigned long)addr); |
98ed7d4b RK |
62 | } |
63 | ||
64 | static inline dma_addr_t virt_to_dma(struct device *dev, void *addr) | |
65 | { | |
66 | return (dma_addr_t)__virt_to_bus((unsigned long)(addr)); | |
67 | } | |
68 | #else | |
9eedd963 | 69 | static inline dma_addr_t pfn_to_dma(struct device *dev, unsigned long pfn) |
98ed7d4b | 70 | { |
9eedd963 | 71 | return __arch_pfn_to_dma(dev, pfn); |
98ed7d4b RK |
72 | } |
73 | ||
9eedd963 | 74 | static inline unsigned long dma_to_pfn(struct device *dev, dma_addr_t addr) |
ef1baed8 | 75 | { |
9eedd963 | 76 | return __arch_dma_to_pfn(dev, addr); |
ef1baed8 RK |
77 | } |
78 | ||
98ed7d4b RK |
79 | static inline void *dma_to_virt(struct device *dev, dma_addr_t addr) |
80 | { | |
81 | return __arch_dma_to_virt(dev, addr); | |
82 | } | |
83 | ||
84 | static inline dma_addr_t virt_to_dma(struct device *dev, void *addr) | |
85 | { | |
86 | return __arch_virt_to_dma(dev, addr); | |
87 | } | |
88 | #endif | |
1fe53268 | 89 | |
06e6295b SS |
90 | static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr) |
91 | { | |
92 | unsigned int offset = paddr & ~PAGE_MASK; | |
93 | return pfn_to_dma(dev, __phys_to_pfn(paddr)) + offset; | |
94 | } | |
95 | ||
96 | static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t dev_addr) | |
97 | { | |
98 | unsigned int offset = dev_addr & ~PAGE_MASK; | |
99 | return __pfn_to_phys(dma_to_pfn(dev, dev_addr)) + offset; | |
100 | } | |
101 | ||
102 | static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size) | |
103 | { | |
104 | u64 limit, mask; | |
105 | ||
106 | if (dev->dma_mask) | |
107 | mask = *dev->dma_mask; | |
108 | else | |
109 | mask = dev->coherent_dma_mask; | |
110 | ||
111 | if (mask == 0) | |
112 | return 0; | |
113 | ||
114 | limit = (mask + 1) & ~mask; | |
115 | if (limit && size > limit) | |
116 | return 0; | |
117 | ||
118 | if ((addr | (addr + size - 1)) & ~mask) | |
119 | return 0; | |
120 | ||
121 | return 1; | |
122 | } | |
123 | ||
124 | static inline void dma_mark_clean(void *addr, size_t size) { } | |
125 | ||
1da177e4 LT |
126 | /* |
127 | * DMA errors are defined by all-bits-set in the DMA address. | |
128 | */ | |
8d8bb39b | 129 | static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) |
1da177e4 | 130 | { |
a0157573 | 131 | debug_dma_mapping_error(dev, dma_addr); |
553ac788 | 132 | return dma_addr == DMA_ERROR_CODE; |
1da177e4 LT |
133 | } |
134 | ||
f454aa6b RK |
135 | /* |
136 | * Dummy noncoherent implementation. We don't provide a dma_cache_sync | |
137 | * function so drivers using this API are highlighted with build warnings. | |
138 | */ | |
3216a97b RK |
139 | static inline void *dma_alloc_noncoherent(struct device *dev, size_t size, |
140 | dma_addr_t *handle, gfp_t gfp) | |
f454aa6b RK |
141 | { |
142 | return NULL; | |
143 | } | |
144 | ||
3216a97b RK |
145 | static inline void dma_free_noncoherent(struct device *dev, size_t size, |
146 | void *cpu_addr, dma_addr_t handle) | |
f454aa6b RK |
147 | { |
148 | } | |
149 | ||
15237e1f MS |
150 | extern int dma_supported(struct device *dev, u64 mask); |
151 | ||
87b54e78 GC |
152 | extern int arm_dma_set_mask(struct device *dev, u64 dma_mask); |
153 | ||
1da177e4 | 154 | /** |
f99d6034 | 155 | * arm_dma_alloc - allocate consistent memory for DMA |
1da177e4 LT |
156 | * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices |
157 | * @size: required memory size | |
158 | * @handle: bus-specific DMA address | |
f99d6034 | 159 | * @attrs: optinal attributes that specific mapping properties |
1da177e4 | 160 | * |
f99d6034 MS |
161 | * Allocate some memory for a device for performing DMA. This function |
162 | * allocates pages, and will return the CPU-viewed address, and sets @handle | |
163 | * to be the device-viewed address. | |
1da177e4 | 164 | */ |
f99d6034 MS |
165 | extern void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, |
166 | gfp_t gfp, struct dma_attrs *attrs); | |
167 | ||
168 | #define dma_alloc_coherent(d, s, h, f) dma_alloc_attrs(d, s, h, f, NULL) | |
169 | ||
170 | static inline void *dma_alloc_attrs(struct device *dev, size_t size, | |
171 | dma_addr_t *dma_handle, gfp_t flag, | |
172 | struct dma_attrs *attrs) | |
173 | { | |
174 | struct dma_map_ops *ops = get_dma_ops(dev); | |
175 | void *cpu_addr; | |
176 | BUG_ON(!ops); | |
177 | ||
178 | cpu_addr = ops->alloc(dev, size, dma_handle, flag, attrs); | |
179 | debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr); | |
180 | return cpu_addr; | |
181 | } | |
1da177e4 LT |
182 | |
183 | /** | |
f99d6034 | 184 | * arm_dma_free - free memory allocated by arm_dma_alloc |
1da177e4 LT |
185 | * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices |
186 | * @size: size of memory originally requested in dma_alloc_coherent | |
187 | * @cpu_addr: CPU-view address returned from dma_alloc_coherent | |
188 | * @handle: device-view address returned from dma_alloc_coherent | |
f99d6034 | 189 | * @attrs: optinal attributes that specific mapping properties |
1da177e4 LT |
190 | * |
191 | * Free (and unmap) a DMA buffer previously allocated by | |
f99d6034 | 192 | * arm_dma_alloc(). |
1da177e4 LT |
193 | * |
194 | * References to memory and mappings associated with cpu_addr/handle | |
195 | * during and after this call executing are illegal. | |
196 | */ | |
f99d6034 MS |
197 | extern void arm_dma_free(struct device *dev, size_t size, void *cpu_addr, |
198 | dma_addr_t handle, struct dma_attrs *attrs); | |
199 | ||
200 | #define dma_free_coherent(d, s, c, h) dma_free_attrs(d, s, c, h, NULL) | |
201 | ||
202 | static inline void dma_free_attrs(struct device *dev, size_t size, | |
203 | void *cpu_addr, dma_addr_t dma_handle, | |
204 | struct dma_attrs *attrs) | |
205 | { | |
206 | struct dma_map_ops *ops = get_dma_ops(dev); | |
207 | BUG_ON(!ops); | |
208 | ||
209 | debug_dma_free_coherent(dev, size, cpu_addr, dma_handle); | |
210 | ops->free(dev, size, cpu_addr, dma_handle, attrs); | |
211 | } | |
1da177e4 LT |
212 | |
213 | /** | |
f99d6034 | 214 | * arm_dma_mmap - map a coherent DMA allocation into user space |
1da177e4 LT |
215 | * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices |
216 | * @vma: vm_area_struct describing requested user mapping | |
217 | * @cpu_addr: kernel CPU-view address returned from dma_alloc_coherent | |
218 | * @handle: device-view address returned from dma_alloc_coherent | |
219 | * @size: size of memory originally requested in dma_alloc_coherent | |
f99d6034 | 220 | * @attrs: optinal attributes that specific mapping properties |
1da177e4 LT |
221 | * |
222 | * Map a coherent DMA buffer previously allocated by dma_alloc_coherent | |
223 | * into user space. The coherent DMA buffer must not be freed by the | |
224 | * driver until the user space mapping has been released. | |
225 | */ | |
f99d6034 MS |
226 | extern int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma, |
227 | void *cpu_addr, dma_addr_t dma_addr, size_t size, | |
228 | struct dma_attrs *attrs); | |
1da177e4 | 229 | |
f99d6034 MS |
230 | static inline void *dma_alloc_writecombine(struct device *dev, size_t size, |
231 | dma_addr_t *dma_handle, gfp_t flag) | |
232 | { | |
233 | DEFINE_DMA_ATTRS(attrs); | |
234 | dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs); | |
235 | return dma_alloc_attrs(dev, size, dma_handle, flag, &attrs); | |
236 | } | |
1da177e4 | 237 | |
f99d6034 MS |
238 | static inline void dma_free_writecombine(struct device *dev, size_t size, |
239 | void *cpu_addr, dma_addr_t dma_handle) | |
240 | { | |
241 | DEFINE_DMA_ATTRS(attrs); | |
242 | dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs); | |
243 | return dma_free_attrs(dev, size, cpu_addr, dma_handle, &attrs); | |
244 | } | |
245 | ||
6e5267aa MS |
246 | /* |
247 | * This can be called during early boot to increase the size of the atomic | |
248 | * coherent DMA pool above the default value of 256KiB. It must be called | |
249 | * before postcore_initcall. | |
250 | */ | |
251 | extern void __init init_dma_coherent_pool_size(unsigned long size); | |
252 | ||
8c8a0ec5 RK |
253 | /* |
254 | * For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic" | |
255 | * and utilize bounce buffers as needed to work around limited DMA windows. | |
256 | * | |
257 | * On the SA-1111, a bug limits DMA to only certain regions of RAM. | |
258 | * On the IXP425, the PCI inbound window is 64MB (256MB total RAM) | |
259 | * On some ADI engineering systems, PCI inbound window is 32MB (12MB total RAM) | |
260 | * | |
261 | * The following are helper functions used by the dmabounce subystem | |
262 | * | |
263 | */ | |
264 | ||
265 | /** | |
266 | * dmabounce_register_dev | |
267 | * | |
268 | * @dev: valid struct device pointer | |
269 | * @small_buf_size: size of buffers to use with small buffer pool | |
270 | * @large_buf_size: size of buffers to use with large buffer pool (can be 0) | |
0703ed2a | 271 | * @needs_bounce_fn: called to determine whether buffer needs bouncing |
8c8a0ec5 RK |
272 | * |
273 | * This function should be called by low-level platform code to register | |
274 | * a device as requireing DMA buffer bouncing. The function will allocate | |
275 | * appropriate DMA pools for the device. | |
8c8a0ec5 | 276 | */ |
3216a97b | 277 | extern int dmabounce_register_dev(struct device *, unsigned long, |
0703ed2a | 278 | unsigned long, int (*)(struct device *, dma_addr_t, size_t)); |
8c8a0ec5 RK |
279 | |
280 | /** | |
281 | * dmabounce_unregister_dev | |
282 | * | |
283 | * @dev: valid struct device pointer | |
284 | * | |
285 | * This function should be called by low-level platform code when device | |
286 | * that was previously registered with dmabounce_register_dev is removed | |
287 | * from the system. | |
288 | * | |
289 | */ | |
290 | extern void dmabounce_unregister_dev(struct device *); | |
291 | ||
8c8a0ec5 | 292 | |
24056f52 | 293 | |
afd1a321 RK |
294 | /* |
295 | * The scatter list versions of the above methods. | |
1da177e4 | 296 | */ |
2dc6a016 MS |
297 | extern int arm_dma_map_sg(struct device *, struct scatterlist *, int, |
298 | enum dma_data_direction, struct dma_attrs *attrs); | |
299 | extern void arm_dma_unmap_sg(struct device *, struct scatterlist *, int, | |
300 | enum dma_data_direction, struct dma_attrs *attrs); | |
301 | extern void arm_dma_sync_sg_for_cpu(struct device *, struct scatterlist *, int, | |
3216a97b | 302 | enum dma_data_direction); |
2dc6a016 | 303 | extern void arm_dma_sync_sg_for_device(struct device *, struct scatterlist *, int, |
3216a97b | 304 | enum dma_data_direction); |
dc2832e1 MS |
305 | extern int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt, |
306 | void *cpu_addr, dma_addr_t dma_addr, size_t size, | |
307 | struct dma_attrs *attrs); | |
1da177e4 | 308 | |
1da177e4 LT |
309 | #endif /* __KERNEL__ */ |
310 | #endif |