dma-mapping: use unsigned long for dma_attrs
[linux-2.6-block.git] / arch / arm / include / asm / dma-mapping.h
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1da177e4
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1#ifndef ASMARM_DMA_MAPPING_H
2#define ASMARM_DMA_MAPPING_H
3
4#ifdef __KERNEL__
5
98ed7d4b 6#include <linux/mm_types.h>
dee9ba82 7#include <linux/scatterlist.h>
24056f52 8#include <linux/dma-debug.h>
1da177e4 9
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10#include <asm/memory.h>
11
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12#include <xen/xen.h>
13#include <asm/xen/hypervisor.h>
14
96231b26 15#define DMA_ERROR_CODE (~(dma_addr_t)0x0)
2dc6a016 16extern struct dma_map_ops arm_dma_ops;
dd37e940 17extern struct dma_map_ops arm_coherent_dma_ops;
2dc6a016 18
c7e9bc54 19static inline struct dma_map_ops *__generic_dma_ops(struct device *dev)
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20{
21 if (dev && dev->archdata.dma_ops)
22 return dev->archdata.dma_ops;
23 return &arm_dma_ops;
24}
25
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26static inline struct dma_map_ops *get_dma_ops(struct device *dev)
27{
28 if (xen_initial_domain())
29 return xen_dma_ops;
30 else
31 return __generic_dma_ops(dev);
32}
33
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34static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops)
35{
36 BUG_ON(!dev);
37 dev->archdata.dma_ops = ops;
38}
39
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40#define HAVE_ARCH_DMA_SUPPORTED 1
41extern int dma_supported(struct device *dev, u64 mask);
42
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43#ifdef __arch_page_to_dma
44#error Please update to __arch_pfn_to_dma
45#endif
46
98ed7d4b 47/*
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48 * dma_to_pfn/pfn_to_dma/dma_to_virt/virt_to_dma are architecture private
49 * functions used internally by the DMA-mapping API to provide DMA
50 * addresses. They must not be used by drivers.
98ed7d4b 51 */
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52#ifndef __arch_pfn_to_dma
53static inline dma_addr_t pfn_to_dma(struct device *dev, unsigned long pfn)
58edb515 54{
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55 if (dev)
56 pfn -= dev->dma_pfn_offset;
9eedd963 57 return (dma_addr_t)__pfn_to_bus(pfn);
58edb515 58}
98ed7d4b 59
9eedd963 60static inline unsigned long dma_to_pfn(struct device *dev, dma_addr_t addr)
ef1baed8 61{
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62 unsigned long pfn = __bus_to_pfn(addr);
63
64 if (dev)
65 pfn += dev->dma_pfn_offset;
66
67 return pfn;
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68}
69
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70static inline void *dma_to_virt(struct device *dev, dma_addr_t addr)
71{
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72 if (dev) {
73 unsigned long pfn = dma_to_pfn(dev, addr);
74
75 return phys_to_virt(__pfn_to_phys(pfn));
76 }
77
01f461a3 78 return (void *)__bus_to_virt((unsigned long)addr);
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79}
80
81static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
82{
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83 if (dev)
84 return pfn_to_dma(dev, virt_to_pfn(addr));
85
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86 return (dma_addr_t)__virt_to_bus((unsigned long)(addr));
87}
26ba47b1 88
98ed7d4b 89#else
9eedd963 90static inline dma_addr_t pfn_to_dma(struct device *dev, unsigned long pfn)
98ed7d4b 91{
9eedd963 92 return __arch_pfn_to_dma(dev, pfn);
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93}
94
9eedd963 95static inline unsigned long dma_to_pfn(struct device *dev, dma_addr_t addr)
ef1baed8 96{
9eedd963 97 return __arch_dma_to_pfn(dev, addr);
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98}
99
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100static inline void *dma_to_virt(struct device *dev, dma_addr_t addr)
101{
102 return __arch_dma_to_virt(dev, addr);
103}
104
105static inline dma_addr_t virt_to_dma(struct device *dev, void *addr)
106{
107 return __arch_virt_to_dma(dev, addr);
108}
109#endif
1fe53268 110
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111/* The ARM override for dma_max_pfn() */
112static inline unsigned long dma_max_pfn(struct device *dev)
113{
114 return PHYS_PFN_OFFSET + dma_to_pfn(dev, *dev->dma_mask);
115}
116#define dma_max_pfn(dev) dma_max_pfn(dev)
117
a3a60f81 118#define arch_setup_dma_ops arch_setup_dma_ops
4bb25789 119extern void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
53c92d79 120 const struct iommu_ops *iommu, bool coherent);
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121
122#define arch_teardown_dma_ops arch_teardown_dma_ops
123extern void arch_teardown_dma_ops(struct device *dev);
812b99e4 124
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125/* do not use this function in a driver */
126static inline bool is_device_dma_coherent(struct device *dev)
127{
128 return dev->archdata.dma_coherent;
129}
130
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131static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
132{
133 unsigned int offset = paddr & ~PAGE_MASK;
134 return pfn_to_dma(dev, __phys_to_pfn(paddr)) + offset;
135}
136
137static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t dev_addr)
138{
139 unsigned int offset = dev_addr & ~PAGE_MASK;
140 return __pfn_to_phys(dma_to_pfn(dev, dev_addr)) + offset;
141}
142
143static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
144{
145 u64 limit, mask;
146
147 if (!dev->dma_mask)
148 return 0;
149
150 mask = *dev->dma_mask;
151
152 limit = (mask + 1) & ~mask;
153 if (limit && size > limit)
154 return 0;
155
156 if ((addr | (addr + size - 1)) & ~mask)
157 return 0;
158
159 return 1;
160}
161
162static inline void dma_mark_clean(void *addr, size_t size) { }
163
1da177e4 164/**
f99d6034 165 * arm_dma_alloc - allocate consistent memory for DMA
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166 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
167 * @size: required memory size
168 * @handle: bus-specific DMA address
f99d6034 169 * @attrs: optinal attributes that specific mapping properties
1da177e4 170 *
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171 * Allocate some memory for a device for performing DMA. This function
172 * allocates pages, and will return the CPU-viewed address, and sets @handle
173 * to be the device-viewed address.
1da177e4 174 */
f99d6034 175extern void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
00085f1e 176 gfp_t gfp, unsigned long attrs);
f99d6034 177
1da177e4 178/**
f99d6034 179 * arm_dma_free - free memory allocated by arm_dma_alloc
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180 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
181 * @size: size of memory originally requested in dma_alloc_coherent
182 * @cpu_addr: CPU-view address returned from dma_alloc_coherent
183 * @handle: device-view address returned from dma_alloc_coherent
f99d6034 184 * @attrs: optinal attributes that specific mapping properties
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185 *
186 * Free (and unmap) a DMA buffer previously allocated by
f99d6034 187 * arm_dma_alloc().
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188 *
189 * References to memory and mappings associated with cpu_addr/handle
190 * during and after this call executing are illegal.
191 */
f99d6034 192extern void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
00085f1e 193 dma_addr_t handle, unsigned long attrs);
f99d6034 194
1da177e4 195/**
f99d6034 196 * arm_dma_mmap - map a coherent DMA allocation into user space
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197 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
198 * @vma: vm_area_struct describing requested user mapping
199 * @cpu_addr: kernel CPU-view address returned from dma_alloc_coherent
200 * @handle: device-view address returned from dma_alloc_coherent
201 * @size: size of memory originally requested in dma_alloc_coherent
f99d6034 202 * @attrs: optinal attributes that specific mapping properties
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203 *
204 * Map a coherent DMA buffer previously allocated by dma_alloc_coherent
205 * into user space. The coherent DMA buffer must not be freed by the
206 * driver until the user space mapping has been released.
207 */
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208extern int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
209 void *cpu_addr, dma_addr_t dma_addr, size_t size,
00085f1e 210 unsigned long attrs);
1da177e4 211
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212/*
213 * This can be called during early boot to increase the size of the atomic
214 * coherent DMA pool above the default value of 256KiB. It must be called
215 * before postcore_initcall.
216 */
217extern void __init init_dma_coherent_pool_size(unsigned long size);
218
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219/*
220 * For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic"
221 * and utilize bounce buffers as needed to work around limited DMA windows.
222 *
223 * On the SA-1111, a bug limits DMA to only certain regions of RAM.
224 * On the IXP425, the PCI inbound window is 64MB (256MB total RAM)
225 * On some ADI engineering systems, PCI inbound window is 32MB (12MB total RAM)
226 *
227 * The following are helper functions used by the dmabounce subystem
228 *
229 */
230
231/**
232 * dmabounce_register_dev
233 *
234 * @dev: valid struct device pointer
235 * @small_buf_size: size of buffers to use with small buffer pool
236 * @large_buf_size: size of buffers to use with large buffer pool (can be 0)
0703ed2a 237 * @needs_bounce_fn: called to determine whether buffer needs bouncing
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238 *
239 * This function should be called by low-level platform code to register
240 * a device as requireing DMA buffer bouncing. The function will allocate
241 * appropriate DMA pools for the device.
8c8a0ec5 242 */
3216a97b 243extern int dmabounce_register_dev(struct device *, unsigned long,
0703ed2a 244 unsigned long, int (*)(struct device *, dma_addr_t, size_t));
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245
246/**
247 * dmabounce_unregister_dev
248 *
249 * @dev: valid struct device pointer
250 *
251 * This function should be called by low-level platform code when device
252 * that was previously registered with dmabounce_register_dev is removed
253 * from the system.
254 *
255 */
256extern void dmabounce_unregister_dev(struct device *);
257
8c8a0ec5 258
24056f52 259
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260/*
261 * The scatter list versions of the above methods.
1da177e4 262 */
2dc6a016 263extern int arm_dma_map_sg(struct device *, struct scatterlist *, int,
00085f1e 264 enum dma_data_direction, unsigned long attrs);
2dc6a016 265extern void arm_dma_unmap_sg(struct device *, struct scatterlist *, int,
00085f1e 266 enum dma_data_direction, unsigned long attrs);
2dc6a016 267extern void arm_dma_sync_sg_for_cpu(struct device *, struct scatterlist *, int,
3216a97b 268 enum dma_data_direction);
2dc6a016 269extern void arm_dma_sync_sg_for_device(struct device *, struct scatterlist *, int,
3216a97b 270 enum dma_data_direction);
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271extern int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt,
272 void *cpu_addr, dma_addr_t dma_addr, size_t size,
00085f1e 273 unsigned long attrs);
1da177e4 274
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275#endif /* __KERNEL__ */
276#endif