[linux-2.6-block.git] / arch / arm / boot / dts / socfpga_vt.dts

/*
 *  Copyright (C) 2013 Altera Corporation <www.altera.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

/dts-v1/;
#include "socfpga.dtsi"

/ {
	model = "Altera SOCFPGA VT";
	compatible = "altr,socfpga-vt", "altr,socfpga";

	chosen {
		bootargs = "console=ttyS0,57600";
	};

	memory@0 {
		name = "memory";
		device_type = "memory";
		reg = <0x0 0x40000000>; /* 1 GB */
	};

	soc {
		clkmgr@ffd04000 {
			clocks {
				osc1 {
					clock-frequency = <10000000>;
				};
			};
		};

		dwmmc0@ff704000 {
			broken-cd;
			bus-width = <4>;
			cap-mmc-highspeed;
			cap-sd-highspeed;
		};

		ethernet@ff700000 {
			phy-mode = "gmii";
			status = "okay";
		};

		timer0@ffc08000 {
			clock-frequency = <7000000>;
		};

		timer1@ffc09000 {
			clock-frequency = <7000000>;
		};

		timer2@ffd00000 {
			clock-frequency = <7000000>;
		};

		timer3@ffd01000 {
			clock-frequency = <7000000>;
		};

		serial0@ffc02000 {
			clock-frequency = <7372800>;
		};

		serial1@ffc03000 {
			clock-frequency = <7372800>;
		};

		sysmgr@ffd08000 {
			cpu1-start-addr = <0xffd08010>;
		};
	};
};

&gmac0 {
	status = "okay";
	phy-mode = "gmii";
};
Commit	Line	Data
c2ad2844 DN	1	/*
	2	* Copyright (C) 2013 Altera Corporation <www.altera.com>
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License as published by
	6	* the Free Software Foundation; either version 2 of the License, or
	7	* (at your option) any later version.
	8	*
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
	13	*
	14	* You should have received a copy of the GNU General Public License
	15	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	16	*/
	17
	18	/dts-v1/;
7da9b436	19	#include "socfpga.dtsi"
c2ad2844 DN	20
	21	/ {
	22	model = "Altera SOCFPGA VT";
	23	compatible = "altr,socfpga-vt", "altr,socfpga";
	24
	25	chosen {
	26	bootargs = "console=ttyS0,57600";
	27	};
	28
332ddfab	29	memory@0 {
c2ad2844 DN	30	name = "memory";
	31	device_type = "memory";
	32	reg = <0x0 0x40000000>; /* 1 GB */
	33	};
	34
	35	soc {
042000b0 DN	36	clkmgr@ffd04000 {
	37	clocks {
	38	osc1 {
	39	clock-frequency = <10000000>;
	40	};
	41	};
	42	};
	43
9b931361	44	dwmmc0@ff704000 {
9b931361	45	broken-cd;
f5bbe55a JC	46	bus-width = <4>;
	47	cap-mmc-highspeed;
	48	cap-sd-highspeed;
9b931361 DN	49	};
9b931361 DN	50
3d954cf1 DN	51	ethernet@ff700000 {
	52	phy-mode = "gmii";
	53	status = "okay";
	54	};
	55
c2ad2844 DN	56	timer0@ffc08000 {
	57	clock-frequency = <7000000>;
	58	};
	59
	60	timer1@ffc09000 {
	61	clock-frequency = <7000000>;
	62	};
	63
	64	timer2@ffd00000 {
	65	clock-frequency = <7000000>;
	66	};
	67
	68	timer3@ffd01000 {
	69	clock-frequency = <7000000>;
	70	};
	71
	72	serial0@ffc02000 {
	73	clock-frequency = <7372800>;
	74	};
	75
	76	serial1@ffc03000 {
	77	clock-frequency = <7372800>;
	78	};
d6dd735f DN	79
	80	sysmgr@ffd08000 {
	81	cpu1-start-addr = <0xffd08010>;
	82	};
c2ad2844 DN	83	};
c2ad2844 DN	84	};
2755e187 DN	85
	86	&gmac0 {
	87	status = "okay";
	88	phy-mode = "gmii";
	89	};