projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 3f187f82 PU |
1 | /* |
| 2 | * Device Tree Source for OMAP243x SoC | |
| 3 | * | |
| 4 | * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ | |
| 5 | * | |
| 6 | * This file is licensed under the terms of the GNU General Public License | |
| 7 | * version 2. This program is licensed "as is" without any warranty of any | |
| 8 | * kind, whether express or implied. | |
| 9 | */ | |
| 10 | ||
| 11 | /include/ "omap2.dtsi" | |
| 12 | ||
| 13 | / { | |
| 14 | compatible = "ti,omap2430", "ti,omap2"; | |
| 15 | ||
| 16 | ocp { | |
| 510c0ffd JH |
17 | counter32k: counter@49020000 { |
| 18 | compatible = "ti,omap-counter32k"; | |
| 19 | reg = <0x49020000 0x20>; | |
| 20 | ti,hwmods = "counter_32k"; | |
| 21 | }; | |
| 22 | ||
| 679e3310 TL |
23 | omap2430_pmx: pinmux@49002030 { |
| 24 | compatible = "ti,omap2430-padconf", "pinctrl-single"; | |
| 25 | reg = <0x49002030 0x0154>; | |
| 26 | #address-cells = <1>; | |
| 27 | #size-cells = <0>; | |
| 28 | pinctrl-single,register-width = <8>; | |
| 29 | pinctrl-single,function-mask = <0x3f>; | |
| 30 | }; | |
| 31 | ||
| 1c7dbb55 JH |
32 | gpmc: gpmc@6e000000 { |
| 33 | compatible = "ti,omap2430-gpmc"; | |
| 34 | reg = <0x6e000000 0x1000>; | |
| 35 | #address-cells = <2>; | |
| 36 | #size-cells = <1>; | |
| 37 | interrupts = <20>; | |
| 38 | gpmc,num-cs = <8>; | |
| 39 | gpmc,num-waitpins = <4>; | |
| 40 | ti,hwmods = "gpmc"; | |
| 41 | }; | |
| 42 | ||
| 3f187f82 PU |
43 | mcbsp1: mcbsp@48074000 { |
| 44 | compatible = "ti,omap2430-mcbsp"; | |
| 45 | reg = <0x48074000 0xff>; | |
| 46 | reg-names = "mpu"; | |
| 47 | interrupts = <64>, /* OCP compliant interrupt */ | |
| 48 | <59>, /* TX interrupt */ | |
| 49 | <60>, /* RX interrupt */ | |
| 50 | <61>; /* RX overflow interrupt */ | |
| 51 | interrupt-names = "common", "tx", "rx", "rx_overflow"; | |
| 3f187f82 PU |
52 | ti,buffer-size = <128>; |
| 53 | ti,hwmods = "mcbsp1"; | |
| 54 | }; | |
| 55 | ||
| 56 | mcbsp2: mcbsp@48076000 { | |
| 57 | compatible = "ti,omap2430-mcbsp"; | |
| 58 | reg = <0x48076000 0xff>; | |
| 59 | reg-names = "mpu"; | |
| 60 | interrupts = <16>, /* OCP compliant interrupt */ | |
| 61 | <62>, /* TX interrupt */ | |
| 62 | <63>; /* RX interrupt */ | |
| 63 | interrupt-names = "common", "tx", "rx"; | |
| 3f187f82 PU |
64 | ti,buffer-size = <128>; |
| 65 | ti,hwmods = "mcbsp2"; | |
| 66 | }; | |
| 67 | ||
| 68 | mcbsp3: mcbsp@4808c000 { | |
| 69 | compatible = "ti,omap2430-mcbsp"; | |
| 70 | reg = <0x4808c000 0xff>; | |
| 71 | reg-names = "mpu"; | |
| 72 | interrupts = <17>, /* OCP compliant interrupt */ | |
| 73 | <89>, /* TX interrupt */ | |
| 74 | <90>; /* RX interrupt */ | |
| 75 | interrupt-names = "common", "tx", "rx"; | |
| 3f187f82 PU |
76 | ti,buffer-size = <128>; |
| 77 | ti,hwmods = "mcbsp3"; | |
| 78 | }; | |
| 79 | ||
| 80 | mcbsp4: mcbsp@4808e000 { | |
| 81 | compatible = "ti,omap2430-mcbsp"; | |
| 82 | reg = <0x4808e000 0xff>; | |
| 83 | reg-names = "mpu"; | |
| 84 | interrupts = <18>, /* OCP compliant interrupt */ | |
| 85 | <54>, /* TX interrupt */ | |
| 86 | <55>; /* RX interrupt */ | |
| 87 | interrupt-names = "common", "tx", "rx"; | |
| 3f187f82 PU |
88 | ti,buffer-size = <128>; |
| 89 | ti,hwmods = "mcbsp4"; | |
| 90 | }; | |
| 91 | ||
| 92 | mcbsp5: mcbsp@48096000 { | |
| 93 | compatible = "ti,omap2430-mcbsp"; | |
| 94 | reg = <0x48096000 0xff>; | |
| 95 | reg-names = "mpu"; | |
| 96 | interrupts = <19>, /* OCP compliant interrupt */ | |
| 97 | <81>, /* TX interrupt */ | |
| 98 | <82>; /* RX interrupt */ | |
| 99 | interrupt-names = "common", "tx", "rx"; | |
| 3f187f82 PU |
100 | ti,buffer-size = <128>; |
| 101 | ti,hwmods = "mcbsp5"; | |
| 102 | }; | |
| fab8ad0b JH |
103 | |
| 104 | timer1: timer@49018000 { | |
| 105 | compatible = "ti,omap2-timer"; | |
| 106 | reg = <0x49018000 0x400>; | |
| 107 | interrupts = <37>; | |
| 108 | ti,hwmods = "timer1"; | |
| 109 | ti,timer-alwon; | |
| 110 | }; | |
| 3f187f82 PU |
111 | }; |
| 112 | }; |