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ARM: dts: imx6qdl-sabrelite: add skews for Micrel phy
[linux-2.6-block.git] / arch / arm / boot / dts / imx6qdl-sabrelite.dtsi
CommitLineData
1efa1265
TK		 1/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13/ {
14 memory {
15 reg = <0x10000000 0x40000000>;
16 };
17
18 regulators {
19 compatible = "simple-bus";
20 #address-cells = <1>;
21 #size-cells = <0>;
22
23 reg_2p5v: regulator@0 {
24 compatible = "regulator-fixed";
25 reg = <0>;
26 regulator-name = "2P5V";
27 regulator-min-microvolt = <2500000>;
28 regulator-max-microvolt = <2500000>;
29 regulator-always-on;
30 };
31
32 reg_3p3v: regulator@1 {
33 compatible = "regulator-fixed";
34 reg = <1>;
35 regulator-name = "3P3V";
36 regulator-min-microvolt = <3300000>;
37 regulator-max-microvolt = <3300000>;
38 regulator-always-on;
39 };
40
41 reg_usb_otg_vbus: regulator@2 {
42 compatible = "regulator-fixed";
43 reg = <2>;
44 regulator-name = "usb_otg_vbus";
45 regulator-min-microvolt = <5000000>;
46 regulator-max-microvolt = <5000000>;
47 gpio = <&gpio3 22 0>;
48 enable-active-high;
49 };
50 };
51
52 sound {
53 compatible = "fsl,imx6q-sabrelite-sgtl5000",
54 "fsl,imx-audio-sgtl5000";
55 model = "imx6q-sabrelite-sgtl5000";
56 ssi-controller = <&ssi1>;
57 audio-codec = <&codec>;
58 audio-routing =
59 "MIC_IN", "Mic Jack",
60 "Mic Jack", "Mic Bias",
61 "Headphone Jack", "HP_OUT";
62 mux-int-port = <1>;
63 mux-ext-port = <4>;
64 };
f5ecc32f
TK		 65
66 backlight_lcd {
67 compatible = "pwm-backlight";
68 pwms = <&pwm1 0 5000000>;
69 brightness-levels = <0 4 8 16 32 64 128 255>;
70 default-brightness-level = <7>;
71 power-supply = <&reg_3p3v>;
72 status = "okay";
73 };
74
75 backlight_lvds {
76 compatible = "pwm-backlight";
77 pwms = <&pwm4 0 5000000>;
78 brightness-levels = <0 4 8 16 32 64 128 255>;
79 default-brightness-level = <7>;
80 power-supply = <&reg_3p3v>;
81 status = "okay";
82 };
1efa1265
TK		 83};
84
85&audmux {
86 pinctrl-names = "default";
87 pinctrl-0 = <&pinctrl_audmux>;
88 status = "okay";
89};
90
91&ecspi1 {
92 fsl,spi-num-chipselects = <1>;
93 cs-gpios = <&gpio3 19 0>;
94 pinctrl-names = "default";
95 pinctrl-0 = <&pinctrl_ecspi1>;
96 status = "okay";
97
98 flash: m25p80@0 {
99 compatible = "sst,sst25vf016b";
100 spi-max-frequency = <20000000>;
101 reg = <0>;
102 };
103};
104
105&fec {
106 pinctrl-names = "default";
107 pinctrl-0 = <&pinctrl_enet>;
108 phy-mode = "rgmii";
109 phy-reset-gpios = <&gpio3 23 0>;
a48a1e52
TK		 110 txen-skew-ps = <0>;
111 txc-skew-ps = <3000>;
112 rxdv-skew-ps = <0>;
113 rxc-skew-ps = <3000>;
114 rxd0-skew-ps = <0>;
115 rxd1-skew-ps = <0>;
116 rxd2-skew-ps = <0>;
117 rxd3-skew-ps = <0>;
118 txd0-skew-ps = <0>;
119 txd1-skew-ps = <0>;
120 txd2-skew-ps = <0>;
121 txd3-skew-ps = <0>;
1efa1265
TK		 122 status = "okay";
123};
124
125&i2c1 {
126 clock-frequency = <100000>;
127 pinctrl-names = "default";
128 pinctrl-0 = <&pinctrl_i2c1>;
129 status = "okay";
130
131 codec: sgtl5000@0a {
132 compatible = "fsl,sgtl5000";
133 reg = <0x0a>;
134 clocks = <&clks 201>;
135 VDDA-supply = <&reg_2p5v>;
136 VDDIO-supply = <&reg_3p3v>;
137 };
138};
139
140&iomuxc {
141 pinctrl-names = "default";
142 pinctrl-0 = <&pinctrl_hog>;
143
144 imx6q-sabrelite {
145 pinctrl_hog: hoggrp {
146 fsl,pins = <
8c766cb4
TK		 147 /* SGTL5000 sys_mclk */
148 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x030b0
1efa1265
TK		 149 >;
150 };
151
152 pinctrl_audmux: audmuxgrp {
153 fsl,pins = <
154 MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
155 MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
156 MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
157 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
158 >;
159 };
160
161 pinctrl_ecspi1: ecspi1grp {
162 fsl,pins = <
163 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
164 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
165 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
c40f58aa 166 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1 /* CS */
1efa1265
TK		 167 >;
168 };
169
170 pinctrl_enet: enetgrp {
171 fsl,pins = <
172 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
173 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
174 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
175 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
176 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
177 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
178 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
179 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
180 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
181 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
182 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
183 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
184 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
185 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
186 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
187 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
f3b0ea61
TK		 188 /* Phy reset */
189 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x000b0
1efa1265
TK		 190 >;
191 };
192
193 pinctrl_i2c1: i2c1grp {
194 fsl,pins = <
195 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
196 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
197 >;
198 };
199
f5ecc32f
TK		 200 pinctrl_pwm1: pwm1grp {
201 fsl,pins = <
202 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
203 >;
204 };
205
206 pinctrl_pwm3: pwm3grp {
207 fsl,pins = <
208 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
209 >;
210 };
211
212 pinctrl_pwm4: pwm4grp {
213 fsl,pins = <
214 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
215 >;
216 };
217
da08d27f
TK		 218 pinctrl_uart1: uart1grp {
219 fsl,pins = <
220 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
221 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
222 >;
223 };
224
1efa1265
TK		 225 pinctrl_uart2: uart2grp {
226 fsl,pins = <
227 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
228 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
229 >;
230 };
231
232 pinctrl_usbotg: usbotggrp {
233 fsl,pins = <
234 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
d06d8785
TK		 235 /* power enable, high active */
236 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0
1efa1265
TK		 237 >;
238 };
239
240 pinctrl_usdhc3: usdhc3grp {
241 fsl,pins = <
242 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
243 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
244 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
245 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
246 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
247 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
473f0fc0
TK		 248 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
249 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 /* WP */
1efa1265
TK		 250 >;
251 };
252
253 pinctrl_usdhc4: usdhc4grp {
254 fsl,pins = <
255 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
256 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
257 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
258 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
259 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
260 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
0e06842f 261 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */
1efa1265
TK		 262 >;
263 };
264 };
265};
266
267&ldb {
268 status = "okay";
269
270 lvds-channel@0 {
271 fsl,data-mapping = "spwg";
272 fsl,data-width = <18>;
273 status = "okay";
274
275 display-timings {
276 native-mode = <&timing0>;
277 timing0: hsd100pxn1 {
278 clock-frequency = <65000000>;
279 hactive = <1024>;
280 vactive = <768>;
281 hback-porch = <220>;
282 hfront-porch = <40>;
283 vback-porch = <21>;
284 vfront-porch = <7>;
285 hsync-len = <60>;
286 vsync-len = <10>;
287 };
288 };
289 };
290};
291
292&pcie {
293 status = "okay";
294};
295
f5ecc32f
TK		 296&pwm1 {
297 pinctrl-names = "default";
298 pinctrl-0 = <&pinctrl_pwm1>;
299 status = "okay";
300};
301
302&pwm3 {
303 pinctrl-names = "default";
304 pinctrl-0 = <&pinctrl_pwm3>;
305 status = "okay";
306};
307
308&pwm4 {
309 pinctrl-names = "default";
310 pinctrl-0 = <&pinctrl_pwm4>;
311 status = "okay";
312};
313
1efa1265
TK		 314&ssi1 {
315 fsl,mode = "i2s-slave";
316 status = "okay";
317};
318
da08d27f
TK		 319&uart1 {
320 pinctrl-names = "default";
321 pinctrl-0 = <&pinctrl_uart1>;
322 status = "okay";
323};
324
1efa1265
TK		 325&uart2 {
326 pinctrl-names = "default";
327 pinctrl-0 = <&pinctrl_uart2>;
328 status = "okay";
329};
330
331&usbh1 {
332 status = "okay";
333};
334
335&usbotg {
336 vbus-supply = <&reg_usb_otg_vbus>;
337 pinctrl-names = "default";
338 pinctrl-0 = <&pinctrl_usbotg>;
339 disable-over-current;
340 status = "okay";
341};
342
343&usdhc3 {
344 pinctrl-names = "default";
345 pinctrl-0 = <&pinctrl_usdhc3>;
346 cd-gpios = <&gpio7 0 0>;
347 wp-gpios = <&gpio7 1 0>;
348 vmmc-supply = <&reg_3p3v>;
349 status = "okay";
350};
351
352&usdhc4 {
353 pinctrl-names = "default";
354 pinctrl-0 = <&pinctrl_usdhc4>;
355 cd-gpios = <&gpio2 6 0>;
1efa1265
TK		 356 vmmc-supply = <&reg_3p3v>;
357 status = "okay";
358};
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