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ARM: dts: armada388-clearfog: enable spi flash
[linux-2.6-block.git] / arch / arm / boot / dts / imx6qdl-sabrelite.dtsi
CommitLineData
1efa1265
TK		 1/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
95a9e6cb
GB		 5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
1efa1265 9 *
95a9e6cb
GB		 10 * a) This file is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation.
13 *
13283626 14 * This file is distributed in the hope that it will be useful,
95a9e6cb
GB		 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
13283626 19 * Or, alternatively,
95a9e6cb
GB		 20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
13283626 24 * restriction, including without limitation the rights to use,
95a9e6cb
GB		 25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
13283626 33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
95a9e6cb
GB		 34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
13283626 37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
95a9e6cb
GB		 38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
1efa1265 41 */
789459c4
SL		 42
43#include <dt-bindings/clock/imx6qdl-clock.h>
da474d4c
TK		 44#include <dt-bindings/gpio/gpio.h>
45#include <dt-bindings/input/input.h>
1efa1265
TK		 46
47/ {
48f51963
SH		 48 chosen {
49 stdout-path = &uart2;
50 };
51
ad00e080 52 memory@10000000 {
1efa1265
TK		 53 reg = <0x10000000 0x40000000>;
54 };
55
56 regulators {
57 compatible = "simple-bus";
58 #address-cells = <1>;
59 #size-cells = <0>;
60
61 reg_2p5v: regulator@0 {
62 compatible = "regulator-fixed";
63 reg = <0>;
64 regulator-name = "2P5V";
65 regulator-min-microvolt = <2500000>;
66 regulator-max-microvolt = <2500000>;
67 regulator-always-on;
68 };
69
70 reg_3p3v: regulator@1 {
71 compatible = "regulator-fixed";
72 reg = <1>;
73 regulator-name = "3P3V";
74 regulator-min-microvolt = <3300000>;
75 regulator-max-microvolt = <3300000>;
76 regulator-always-on;
77 };
78
79 reg_usb_otg_vbus: regulator@2 {
80 compatible = "regulator-fixed";
81 reg = <2>;
82 regulator-name = "usb_otg_vbus";
83 regulator-min-microvolt = <5000000>;
84 regulator-max-microvolt = <5000000>;
85 gpio = <&gpio3 22 0>;
86 enable-active-high;
87 };
366c595f
PS		 88
89 reg_can_xcvr: regulator@3 {
90 compatible = "regulator-fixed";
91 reg = <3>;
92 regulator-name = "CAN XCVR";
93 regulator-min-microvolt = <3300000>;
94 regulator-max-microvolt = <3300000>;
95 pinctrl-names = "default";
96 pinctrl-0 = <&pinctrl_can_xcvr>;
97 gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
98 };
789459c4
SL		 99
100 reg_1p5v: regulator@4 {
101 compatible = "regulator-fixed";
102 reg = <4>;
103 regulator-name = "1P5V";
104 regulator-min-microvolt = <1500000>;
105 regulator-max-microvolt = <1500000>;
106 regulator-always-on;
107 };
108
109 reg_1p8v: regulator@5 {
110 compatible = "regulator-fixed";
111 reg = <5>;
112 regulator-name = "1P8V";
113 regulator-min-microvolt = <1800000>;
114 regulator-max-microvolt = <1800000>;
115 regulator-always-on;
116 };
117
118 reg_2p8v: regulator@6 {
119 compatible = "regulator-fixed";
120 reg = <6>;
121 regulator-name = "2P8V";
122 regulator-min-microvolt = <2800000>;
123 regulator-max-microvolt = <2800000>;
124 regulator-always-on;
125 };
b1900445
GB		 126
127 reg_usb_h1_vbus: regulator@7 {
128 compatible = "regulator-fixed";
129 reg = <7>;
130 pinctrl-names = "default";
131 pinctrl-0 = <&pinctrl_usbh1>;
132 regulator-name = "usb_h1_vbus";
133 regulator-min-microvolt = <3300000>;
134 regulator-max-microvolt = <3300000>;
135 gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
136 enable-active-high;
137 };
789459c4
SL		 138 };
139
140 mipi_xclk: mipi_xclk {
141 compatible = "pwm-clock";
142 #clock-cells = <0>;
143 clock-frequency = <22000000>;
144 clock-output-names = "mipi_pwm3";
145 pwms = <&pwm3 0 45>; /* 1 / 45 ns = 22 MHz */
146 status = "okay";
1efa1265
TK		 147 };
148
da474d4c
TK		 149 gpio-keys {
150 compatible = "gpio-keys";
151 pinctrl-names = "default";
152 pinctrl-0 = <&pinctrl_gpio_keys>;
153
154 power {
155 label = "Power Button";
156 gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
157 linux,code = <KEY_POWER>;
26cefdd1 158 wakeup-source;
da474d4c
TK		 159 };
160
161 menu {
162 label = "Menu";
163 gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
164 linux,code = <KEY_MENU>;
165 };
166
167 home {
168 label = "Home";
169 gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
170 linux,code = <KEY_HOME>;
171 };
172
173 back {
174 label = "Back";
175 gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
176 linux,code = <KEY_BACK>;
177 };
178
179 volume-up {
180 label = "Volume Up";
181 gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
182 linux,code = <KEY_VOLUMEUP>;
183 };
184
185 volume-down {
186 label = "Volume Down";
187 gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
188 linux,code = <KEY_VOLUMEDOWN>;
189 };
190 };
191
1efa1265
TK		 192 sound {
193 compatible = "fsl,imx6q-sabrelite-sgtl5000",
194 "fsl,imx-audio-sgtl5000";
195 model = "imx6q-sabrelite-sgtl5000";
196 ssi-controller = <&ssi1>;
197 audio-codec = <&codec>;
198 audio-routing =
199 "MIC_IN", "Mic Jack",
200 "Mic Jack", "Mic Bias",
201 "Headphone Jack", "HP_OUT";
202 mux-int-port = <1>;
203 mux-ext-port = <4>;
204 };
f5ecc32f 205
4abe28ea 206 backlight_lcd: backlight-lcd {
f5ecc32f
TK		 207 compatible = "pwm-backlight";
208 pwms = <&pwm1 0 5000000>;
209 brightness-levels = <0 4 8 16 32 64 128 255>;
210 default-brightness-level = <7>;
211 power-supply = <&reg_3p3v>;
212 status = "okay";
213 };
214
4abe28ea 215 backlight_lvds: backlight-lvds {
f5ecc32f
TK		 216 compatible = "pwm-backlight";
217 pwms = <&pwm4 0 5000000>;
218 brightness-levels = <0 4 8 16 32 64 128 255>;
219 default-brightness-level = <7>;
220 power-supply = <&reg_3p3v>;
221 status = "okay";
222 };
4dc633e9 223
792d4edd 224 lcd_display: disp0 {
d0ddcc53
GB		 225 compatible = "fsl,imx-parallel-display";
226 #address-cells = <1>;
227 #size-cells = <0>;
228 interface-pix-fmt = "bgr666";
229 pinctrl-names = "default";
230 pinctrl-0 = <&pinctrl_j15>;
231 status = "okay";
232
233 port@0 {
234 reg = <0>;
235
236 lcd_display_in: endpoint {
237 remote-endpoint = <&ipu1_di0_disp0>;
238 };
239 };
240
241 port@1 {
242 reg = <1>;
243
244 lcd_display_out: endpoint {
245 remote-endpoint = <&lcd_panel_in>;
246 };
247 };
248 };
249
4abe28ea 250 panel-lcd {
d0ddcc53
GB		 251 compatible = "okaya,rs800480t-7x0gp";
252 backlight = <&backlight_lcd>;
253
254 port {
255 lcd_panel_in: endpoint {
256 remote-endpoint = <&lcd_display_out>;
257 };
258 };
259 };
260
4abe28ea 261 panel-lvds0 {
4dc633e9
EN		 262 compatible = "hannstar,hsd100pxn1";
263 backlight = <&backlight_lvds>;
264
265 port {
266 panel_in: endpoint {
267 remote-endpoint = <&lvds0_out>;
268 };
269 };
270 };
1efa1265
TK		 271};
272
789459c4
SL		 273&ipu1_csi0_from_ipu1_csi0_mux {
274 bus-width = <8>;
275 data-shift = <12>; /* Lines 19:12 used */
276 hsync-active = <1>;
277 vync-active = <1>;
278};
279
280&ipu1_csi0_mux_from_parallel_sensor {
281 remote-endpoint = <&ov5642_to_ipu1_csi0_mux>;
282};
283
284&ipu1_csi0 {
285 pinctrl-names = "default";
286 pinctrl-0 = <&pinctrl_ipu1_csi0>;
287};
288
1efa1265
TK		 289&audmux {
290 pinctrl-names = "default";
291 pinctrl-0 = <&pinctrl_audmux>;
292 status = "okay";
293};
294
366c595f
PS		 295&can1 {
296 pinctrl-names = "default";
297 pinctrl-0 = <&pinctrl_can1>;
298 xceiver-supply = <&reg_can_xcvr>;
299 status = "okay";
300};
301
b6db3097
FE		 302&clks {
303 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
304 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
305 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
306 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
307};
308
1efa1265 309&ecspi1 {
1efa1265
TK		 310 cs-gpios = <&gpio3 19 0>;
311 pinctrl-names = "default";
312 pinctrl-0 = <&pinctrl_ecspi1>;
313 status = "okay";
314
315 flash: m25p80@0 {
79826ac6 316 compatible = "sst,sst25vf016b", "jedec,spi-nor";
1efa1265
TK		 317 spi-max-frequency = <20000000>;
318 reg = <0>;
319 };
320};
321
322&fec {
323 pinctrl-names = "default";
324 pinctrl-0 = <&pinctrl_enet>;
325 phy-mode = "rgmii";
a58a12ae 326 phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
a48a1e52
TK		 327 txen-skew-ps = <0>;
328 txc-skew-ps = <3000>;
329 rxdv-skew-ps = <0>;
330 rxc-skew-ps = <3000>;
331 rxd0-skew-ps = <0>;
332 rxd1-skew-ps = <0>;
333 rxd2-skew-ps = <0>;
334 rxd3-skew-ps = <0>;
335 txd0-skew-ps = <0>;
336 txd1-skew-ps = <0>;
337 txd2-skew-ps = <0>;
338 txd3-skew-ps = <0>;
1efa1265
TK		 339 status = "okay";
340};
341
8eedffe5
EN		 342&hdmi {
343 ddc-i2c-bus = <&i2c2>;
344 status = "okay";
345};
346
1efa1265
TK		 347&i2c1 {
348 clock-frequency = <100000>;
349 pinctrl-names = "default";
350 pinctrl-0 = <&pinctrl_i2c1>;
351 status = "okay";
352
8dccafaa 353 codec: sgtl5000@a {
1efa1265
TK		 354 compatible = "fsl,sgtl5000";
355 reg = <0x0a>;
b26a68c1 356 clocks = <&clks IMX6QDL_CLK_CKO>;
1efa1265
TK		 357 VDDA-supply = <&reg_2p5v>;
358 VDDIO-supply = <&reg_3p3v>;
359 };
360};
361
d9515346
EN		 362&i2c2 {
363 clock-frequency = <100000>;
364 pinctrl-names = "default";
365 pinctrl-0 = <&pinctrl_i2c2>;
366 status = "okay";
789459c4
SL		 367
368 ov5640: camera@40 {
369 compatible = "ovti,ov5640";
370 pinctrl-names = "default";
371 pinctrl-0 = <&pinctrl_ov5640>;
372 reg = <0x40>;
373 clocks = <&mipi_xclk>;
374 clock-names = "xclk";
375 DOVDD-supply = <&reg_1p8v>;
376 AVDD-supply = <&reg_2p8v>;
377 DVDD-supply = <&reg_1p5v>;
378 reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; /* NANDF_D5 */
379 powerdown-gpios = <&gpio6 9 GPIO_ACTIVE_HIGH>; /* NANDF_WP_B */
380
381 port {
789459c4
SL		 382 ov5640_to_mipi_csi2: endpoint {
383 remote-endpoint = <&mipi_csi2_in>;
384 clock-lanes = <0>;
385 data-lanes = <1 2>;
386 };
387 };
388 };
389
390 ov5642: camera@42 {
391 compatible = "ovti,ov5642";
392 pinctrl-names = "default";
393 pinctrl-0 = <&pinctrl_ov5642>;
394 clocks = <&clks IMX6QDL_CLK_CKO2>;
395 clock-names = "xclk";
396 reg = <0x42>;
397 reset-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
398 powerdown-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
399 gp-gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
400 status = "disabled";
401
402 port {
403 ov5642_to_ipu1_csi0_mux: endpoint {
404 remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
405 bus-width = <8>;
406 hsync-active = <1>;
407 vsync-active = <1>;
408 };
409 };
410 };
d9515346
EN		 411};
412
0a3e41ff
EN		 413&i2c3 {
414 clock-frequency = <100000>;
415 pinctrl-names = "default";
416 pinctrl-0 = <&pinctrl_i2c3>;
417 status = "okay";
418};
419
1efa1265
TK		 420&iomuxc {
421 pinctrl-names = "default";
422 pinctrl-0 = <&pinctrl_hog>;
423
424 imx6q-sabrelite {
425 pinctrl_hog: hoggrp {
426 fsl,pins = <
8c766cb4
TK		 427 /* SGTL5000 sys_mclk */
428 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x030b0
1efa1265
TK		 429 >;
430 };
431
432 pinctrl_audmux: audmuxgrp {
433 fsl,pins = <
434 MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
435 MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
436 MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
437 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
438 >;
439 };
440
366c595f
PS		 441 pinctrl_can1: can1grp {
442 fsl,pins = <
443 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0
444 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0
445 >;
446 };
447
448 pinctrl_can_xcvr: can-xcvrgrp {
449 fsl,pins = <
450 /* Flexcan XCVR enable */
451 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
452 >;
453 };
454
1efa1265
TK		 455 pinctrl_ecspi1: ecspi1grp {
456 fsl,pins = <
457 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
458 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
459 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
c40f58aa 460 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1 /* CS */
1efa1265
TK		 461 >;
462 };
463
464 pinctrl_enet: enetgrp {
465 fsl,pins = <
fde90938
TK		 466 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
467 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
c007b3a6
UKK		 468 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
469 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
470 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
471 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
472 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
473 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
fde90938 474 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
c007b3a6
UKK		 475 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
476 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
477 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
478 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
479 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
480 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
f3b0ea61
TK		 481 /* Phy reset */
482 MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x000b0
1efa1265
TK		 483 >;
484 };
485
4abe28ea 486 pinctrl_gpio_keys: gpio-keysgrp {
da474d4c
TK		 487 fsl,pins = <
488 /* Power Button */
489 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
490 /* Menu Button */
491 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
492 /* Home Button */
493 MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
494 /* Back Button */
495 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
496 /* Volume Up Button */
497 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
498 /* Volume Down Button */
499 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
500 >;
501 };
502
1efa1265
TK		 503 pinctrl_i2c1: i2c1grp {
504 fsl,pins = <
505 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
506 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
507 >;
508 };
509
d9515346
EN		 510 pinctrl_i2c2: i2c2grp {
511 fsl,pins = <
512 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
513 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
514 >;
515 };
516
0a3e41ff
EN		 517 pinctrl_i2c3: i2c3grp {
518 fsl,pins = <
519 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
520 MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
521 >;
522 };
523
789459c4
SL		 524 pinctrl_ipu1_csi0: ipu1csi0grp {
525 fsl,pins = <
526 MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0
527 MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0
528 MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0
529 MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0
530 MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0
531 MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0
532 MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0
533 MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0
534 MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0
535 MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x1b0b0
536 MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x1b0b0
537 MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN 0x1b0b0
538 >;
539 };
540
d0ddcc53
GB		 541 pinctrl_j15: j15grp {
542 fsl,pins = <
543 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
544 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
545 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
546 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
547 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
548 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
549 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
550 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
551 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
552 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
553 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
554 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
555 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
556 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
557 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
558 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
559 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
560 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
561 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
562 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
563 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
564 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
565 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
566 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
567 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
568 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
569 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
570 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
571 >;
572 };
573
789459c4
SL		 574 pinctrl_ov5640: ov5640grp {
575 fsl,pins = <
576 MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x000b0
577 MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x0b0b0
578 >;
579 };
580
581 pinctrl_ov5642: ov5642grp {
582 fsl,pins = <
583 MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0
584 MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1b0b0
585 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x130b0
586 MX6QDL_PAD_GPIO_3__CCM_CLKO2 0x000b0
587 >;
588 };
589
f5ecc32f
TK		 590 pinctrl_pwm1: pwm1grp {
591 fsl,pins = <
592 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
593 >;
594 };
595
596 pinctrl_pwm3: pwm3grp {
597 fsl,pins = <
598 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
599 >;
600 };
601
602 pinctrl_pwm4: pwm4grp {
603 fsl,pins = <
604 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
605 >;
606 };
607
da08d27f
TK		 608 pinctrl_uart1: uart1grp {
609 fsl,pins = <
610 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
611 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
612 >;
613 };
614
1efa1265
TK		 615 pinctrl_uart2: uart2grp {
616 fsl,pins = <
617 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
618 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
619 >;
620 };
621
b1900445
GB		 622 pinctrl_usbh1: usbh1grp {
623 fsl,pins = <
624 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x030b0
625 >;
626 };
627
1efa1265
TK		 628 pinctrl_usbotg: usbotggrp {
629 fsl,pins = <
630 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
da5b112d 631 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
d06d8785
TK		 632 /* power enable, high active */
633 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0
1efa1265
TK		 634 >;
635 };
636
637 pinctrl_usdhc3: usdhc3grp {
638 fsl,pins = <
639 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
640 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
641 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
642 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
643 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
644 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
473f0fc0
TK		 645 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
646 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 /* WP */
1efa1265
TK		 647 >;
648 };
649
650 pinctrl_usdhc4: usdhc4grp {
651 fsl,pins = <
652 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
653 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
654 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
655 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
656 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
657 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
0e06842f 658 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */
1efa1265
TK		 659 >;
660 };
661 };
662};
663
d0ddcc53
GB		 664&ipu1_di0_disp0 {
665 remote-endpoint = <&lcd_display_in>;
666};
667
1efa1265
TK		 668&ldb {
669 status = "okay";
670
671 lvds-channel@0 {
1efa1265
TK		 672 status = "okay";
673
4dc633e9
EN		 674 port@4 {
675 reg = <4>;
676
677 lvds0_out: endpoint {
678 remote-endpoint = <&panel_in>;
1efa1265
TK		 679 };
680 };
681 };
682};
683
684&pcie {
685 status = "okay";
686};
687
f5ecc32f
TK		 688&pwm1 {
689 pinctrl-names = "default";
690 pinctrl-0 = <&pinctrl_pwm1>;
691 status = "okay";
692};
693
694&pwm3 {
695 pinctrl-names = "default";
696 pinctrl-0 = <&pinctrl_pwm3>;
697 status = "okay";
698};
699
700&pwm4 {
701 pinctrl-names = "default";
702 pinctrl-0 = <&pinctrl_pwm4>;
703 status = "okay";
704};
705
1efa1265 706&ssi1 {
1efa1265
TK		 707 status = "okay";
708};
709
da08d27f
TK		 710&uart1 {
711 pinctrl-names = "default";
712 pinctrl-0 = <&pinctrl_uart1>;
713 status = "okay";
714};
715
1efa1265
TK		 716&uart2 {
717 pinctrl-names = "default";
718 pinctrl-0 = <&pinctrl_uart2>;
719 status = "okay";
720};
721
722&usbh1 {
b1900445 723 vbus-supply = <&reg_usb_h1_vbus>;
1efa1265
TK		 724 status = "okay";
725};
726
727&usbotg {
728 vbus-supply = <&reg_usb_otg_vbus>;
729 pinctrl-names = "default";
730 pinctrl-0 = <&pinctrl_usbotg>;
731 disable-over-current;
732 status = "okay";
733};
734
735&usdhc3 {
736 pinctrl-names = "default";
737 pinctrl-0 = <&pinctrl_usdhc3>;
89c1a8cf
DA		 738 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
739 wp-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
1efa1265
TK		 740 vmmc-supply = <&reg_3p3v>;
741 status = "okay";
742};
743
744&usdhc4 {
745 pinctrl-names = "default";
746 pinctrl-0 = <&pinctrl_usdhc4>;
89c1a8cf 747 cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
1efa1265
TK		 748 vmmc-supply = <&reg_3p3v>;
749 status = "okay";
750};
789459c4
SL		 751
752&mipi_csi {
753 status = "okay";
754
755 port@0 {
756 reg = <0>;
757
758 mipi_csi2_in: endpoint {
759 remote-endpoint = <&ov5640_to_mipi_csi2>;
760 clock-lanes = <0>;
761 data-lanes = <1 2>;
762 };
763 };
764};
Linux 6.x block layer and io_uring tree(s)