Commit | Line | Data |
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5fc0b42a AC |
1 | /* |
2 | * Device Tree Source for AM33XX SoC | |
3 | * | |
4 | * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ | |
5 | * | |
6 | * This file is licensed under the terms of the GNU General Public License | |
7 | * version 2. This program is licensed "as is" without any warranty of any | |
8 | * kind, whether express or implied. | |
9 | */ | |
10 | ||
e94233c2 | 11 | #include <dt-bindings/gpio/gpio.h> |
6a8a6b65 | 12 | #include <dt-bindings/pinctrl/am33xx.h> |
e94233c2 | 13 | |
eb33ef66 | 14 | #include "skeleton.dtsi" |
5fc0b42a AC |
15 | |
16 | / { | |
17 | compatible = "ti,am33xx"; | |
4c94ac29 | 18 | interrupt-parent = <&intc>; |
5fc0b42a AC |
19 | |
20 | aliases { | |
6a968678 NM |
21 | i2c0 = &i2c0; |
22 | i2c1 = &i2c1; | |
23 | i2c2 = &i2c2; | |
dde3b0d6 VH |
24 | serial0 = &uart0; |
25 | serial1 = &uart1; | |
26 | serial2 = &uart2; | |
27 | serial3 = &uart3; | |
28 | serial4 = &uart4; | |
29 | serial5 = &uart5; | |
7a57ee87 AC |
30 | d_can0 = &dcan0; |
31 | d_can1 = &dcan1; | |
97238b35 SAS |
32 | usb0 = &usb0; |
33 | usb1 = &usb1; | |
34 | phy0 = &usb0_phy; | |
35 | phy1 = &usb1_phy; | |
8170056d DM |
36 | ethernet0 = &cpsw_emac0; |
37 | ethernet1 = &cpsw_emac1; | |
5fc0b42a AC |
38 | }; |
39 | ||
40 | cpus { | |
2e0d513f LP |
41 | #address-cells = <1>; |
42 | #size-cells = <0>; | |
5fc0b42a AC |
43 | cpu@0 { |
44 | compatible = "arm,cortex-a8"; | |
2e0d513f LP |
45 | device_type = "cpu"; |
46 | reg = <0>; | |
efeedcf2 AC |
47 | |
48 | /* | |
49 | * To consider voltage drop between PMIC and SoC, | |
50 | * tolerance value is reduced to 2% from 4% and | |
51 | * voltage value is increased as a precaution. | |
52 | */ | |
53 | operating-points = < | |
54 | /* kHz uV */ | |
55 | 720000 1285000 | |
56 | 600000 1225000 | |
57 | 500000 1125000 | |
58 | 275000 1125000 | |
59 | >; | |
60 | voltage-tolerance = <2>; /* 2 percentage */ | |
8d766fa2 NM |
61 | |
62 | clocks = <&dpll_mpu_ck>; | |
63 | clock-names = "cpu"; | |
64 | ||
efeedcf2 | 65 | clock-latency = <300000>; /* From omap-cpufreq driver */ |
5fc0b42a AC |
66 | }; |
67 | }; | |
68 | ||
6797cdbe AB |
69 | pmu { |
70 | compatible = "arm,cortex-a8-pmu"; | |
71 | interrupts = <3>; | |
72 | }; | |
73 | ||
5fc0b42a | 74 | /* |
5c5be9db | 75 | * The soc node represents the soc top level view. It is used for IPs |
5fc0b42a AC |
76 | * that are not memory mapped in the MPU view or for the MPU itself. |
77 | */ | |
78 | soc { | |
79 | compatible = "ti,omap-infra"; | |
80 | mpu { | |
81 | compatible = "ti,omap3-mpu"; | |
82 | ti,hwmods = "mpu"; | |
83 | }; | |
84 | }; | |
85 | ||
86 | /* | |
87 | * XXX: Use a flat representation of the AM33XX interconnect. | |
b7ab524b GU |
88 | * The real AM33XX interconnect network is quite complex. Since |
89 | * it will not bring real advantage to represent that in DT | |
5fc0b42a AC |
90 | * for the moment, just use a fake OCP bus entry to represent |
91 | * the whole bus hierarchy. | |
92 | */ | |
93 | ocp { | |
94 | compatible = "simple-bus"; | |
95 | #address-cells = <1>; | |
96 | #size-cells = <1>; | |
97 | ranges; | |
98 | ti,hwmods = "l3_main"; | |
99 | ||
e3bc5358 TK |
100 | l4_wkup: l4_wkup@44c00000 { |
101 | compatible = "ti,am3-l4-wkup", "simple-bus"; | |
102 | #address-cells = <1>; | |
103 | #size-cells = <1>; | |
104 | ranges = <0 0x44c00000 0x280000>; | |
ea291c98 | 105 | |
e3bc5358 TK |
106 | prcm: prcm@200000 { |
107 | compatible = "ti,am3-prcm"; | |
108 | reg = <0x200000 0x4000>; | |
ea291c98 | 109 | |
e3bc5358 TK |
110 | prcm_clocks: clocks { |
111 | #address-cells = <1>; | |
112 | #size-cells = <0>; | |
113 | }; | |
ea291c98 | 114 | |
e3bc5358 TK |
115 | prcm_clockdomains: clockdomains { |
116 | }; | |
ea291c98 TK |
117 | }; |
118 | ||
e3bc5358 TK |
119 | scm: scm@210000 { |
120 | compatible = "ti,am3-scm", "simple-bus"; | |
121 | reg = <0x210000 0x2000>; | |
122 | #address-cells = <1>; | |
123 | #size-cells = <1>; | |
124 | ranges = <0 0x210000 0x2000>; | |
125 | ||
126 | am33xx_pinmux: pinmux@800 { | |
127 | compatible = "pinctrl-single"; | |
128 | reg = <0x800 0x238>; | |
129 | #address-cells = <1>; | |
130 | #size-cells = <0>; | |
131 | pinctrl-single,register-width = <32>; | |
132 | pinctrl-single,function-mask = <0x7f>; | |
133 | }; | |
134 | ||
135 | scm_conf: scm_conf@0 { | |
136 | compatible = "syscon"; | |
137 | reg = <0x0 0x800>; | |
138 | #address-cells = <1>; | |
139 | #size-cells = <1>; | |
140 | ||
141 | scm_clocks: clocks { | |
142 | #address-cells = <1>; | |
143 | #size-cells = <0>; | |
144 | }; | |
145 | }; | |
146 | ||
147 | scm_clockdomains: clockdomains { | |
148 | }; | |
ea291c98 TK |
149 | }; |
150 | }; | |
151 | ||
5fc0b42a | 152 | intc: interrupt-controller@48200000 { |
cab82b76 | 153 | compatible = "ti,am33xx-intc"; |
5fc0b42a AC |
154 | interrupt-controller; |
155 | #interrupt-cells = <1>; | |
5fc0b42a AC |
156 | reg = <0x48200000 0x1000>; |
157 | }; | |
158 | ||
505975d3 MP |
159 | edma: edma@49000000 { |
160 | compatible = "ti,edma3"; | |
161 | ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2"; | |
162 | reg = <0x49000000 0x10000>, | |
cf7eb979 | 163 | <0x44e10f90 0x40>; |
505975d3 MP |
164 | interrupts = <12 13 14>; |
165 | #dma-cells = <1>; | |
505975d3 MP |
166 | }; |
167 | ||
b918e2c0 | 168 | gpio0: gpio@44e07000 { |
5fc0b42a AC |
169 | compatible = "ti,omap4-gpio"; |
170 | ti,hwmods = "gpio1"; | |
171 | gpio-controller; | |
172 | #gpio-cells = <2>; | |
173 | interrupt-controller; | |
5eac0eb7 | 174 | #interrupt-cells = <2>; |
4462b31c | 175 | reg = <0x44e07000 0x1000>; |
4462b31c | 176 | interrupts = <96>; |
5fc0b42a AC |
177 | }; |
178 | ||
b918e2c0 | 179 | gpio1: gpio@4804c000 { |
5fc0b42a AC |
180 | compatible = "ti,omap4-gpio"; |
181 | ti,hwmods = "gpio2"; | |
182 | gpio-controller; | |
183 | #gpio-cells = <2>; | |
184 | interrupt-controller; | |
5eac0eb7 | 185 | #interrupt-cells = <2>; |
4462b31c | 186 | reg = <0x4804c000 0x1000>; |
4462b31c | 187 | interrupts = <98>; |
5fc0b42a AC |
188 | }; |
189 | ||
b918e2c0 | 190 | gpio2: gpio@481ac000 { |
5fc0b42a AC |
191 | compatible = "ti,omap4-gpio"; |
192 | ti,hwmods = "gpio3"; | |
193 | gpio-controller; | |
194 | #gpio-cells = <2>; | |
195 | interrupt-controller; | |
5eac0eb7 | 196 | #interrupt-cells = <2>; |
4462b31c | 197 | reg = <0x481ac000 0x1000>; |
4462b31c | 198 | interrupts = <32>; |
5fc0b42a AC |
199 | }; |
200 | ||
b918e2c0 | 201 | gpio3: gpio@481ae000 { |
5fc0b42a AC |
202 | compatible = "ti,omap4-gpio"; |
203 | ti,hwmods = "gpio4"; | |
204 | gpio-controller; | |
205 | #gpio-cells = <2>; | |
206 | interrupt-controller; | |
5eac0eb7 | 207 | #interrupt-cells = <2>; |
4462b31c | 208 | reg = <0x481ae000 0x1000>; |
4462b31c | 209 | interrupts = <62>; |
5fc0b42a AC |
210 | }; |
211 | ||
dde3b0d6 | 212 | uart0: serial@44e09000 { |
5fc0b42a AC |
213 | compatible = "ti,omap3-uart"; |
214 | ti,hwmods = "uart1"; | |
215 | clock-frequency = <48000000>; | |
4462b31c | 216 | reg = <0x44e09000 0x2000>; |
4462b31c | 217 | interrupts = <72>; |
53d91034 | 218 | status = "disabled"; |
13fd3d57 SAS |
219 | dmas = <&edma 26>, <&edma 27>; |
220 | dma-names = "tx", "rx"; | |
5fc0b42a AC |
221 | }; |
222 | ||
dde3b0d6 | 223 | uart1: serial@48022000 { |
5fc0b42a AC |
224 | compatible = "ti,omap3-uart"; |
225 | ti,hwmods = "uart2"; | |
226 | clock-frequency = <48000000>; | |
4462b31c | 227 | reg = <0x48022000 0x2000>; |
4462b31c | 228 | interrupts = <73>; |
53d91034 | 229 | status = "disabled"; |
13fd3d57 SAS |
230 | dmas = <&edma 28>, <&edma 29>; |
231 | dma-names = "tx", "rx"; | |
5fc0b42a AC |
232 | }; |
233 | ||
dde3b0d6 | 234 | uart2: serial@48024000 { |
5fc0b42a AC |
235 | compatible = "ti,omap3-uart"; |
236 | ti,hwmods = "uart3"; | |
237 | clock-frequency = <48000000>; | |
4462b31c | 238 | reg = <0x48024000 0x2000>; |
4462b31c | 239 | interrupts = <74>; |
53d91034 | 240 | status = "disabled"; |
13fd3d57 SAS |
241 | dmas = <&edma 30>, <&edma 31>; |
242 | dma-names = "tx", "rx"; | |
5fc0b42a AC |
243 | }; |
244 | ||
dde3b0d6 | 245 | uart3: serial@481a6000 { |
5fc0b42a AC |
246 | compatible = "ti,omap3-uart"; |
247 | ti,hwmods = "uart4"; | |
248 | clock-frequency = <48000000>; | |
4462b31c | 249 | reg = <0x481a6000 0x2000>; |
4462b31c | 250 | interrupts = <44>; |
53d91034 | 251 | status = "disabled"; |
5fc0b42a AC |
252 | }; |
253 | ||
dde3b0d6 | 254 | uart4: serial@481a8000 { |
5fc0b42a AC |
255 | compatible = "ti,omap3-uart"; |
256 | ti,hwmods = "uart5"; | |
257 | clock-frequency = <48000000>; | |
4462b31c | 258 | reg = <0x481a8000 0x2000>; |
4462b31c | 259 | interrupts = <45>; |
53d91034 | 260 | status = "disabled"; |
5fc0b42a AC |
261 | }; |
262 | ||
dde3b0d6 | 263 | uart5: serial@481aa000 { |
5fc0b42a AC |
264 | compatible = "ti,omap3-uart"; |
265 | ti,hwmods = "uart6"; | |
266 | clock-frequency = <48000000>; | |
4462b31c | 267 | reg = <0x481aa000 0x2000>; |
4462b31c | 268 | interrupts = <46>; |
53d91034 | 269 | status = "disabled"; |
5fc0b42a AC |
270 | }; |
271 | ||
b918e2c0 | 272 | i2c0: i2c@44e0b000 { |
5fc0b42a AC |
273 | compatible = "ti,omap4-i2c"; |
274 | #address-cells = <1>; | |
275 | #size-cells = <0>; | |
276 | ti,hwmods = "i2c1"; | |
4462b31c | 277 | reg = <0x44e0b000 0x1000>; |
4462b31c | 278 | interrupts = <70>; |
53d91034 | 279 | status = "disabled"; |
5fc0b42a AC |
280 | }; |
281 | ||
b918e2c0 | 282 | i2c1: i2c@4802a000 { |
5fc0b42a AC |
283 | compatible = "ti,omap4-i2c"; |
284 | #address-cells = <1>; | |
285 | #size-cells = <0>; | |
286 | ti,hwmods = "i2c2"; | |
4462b31c | 287 | reg = <0x4802a000 0x1000>; |
4462b31c | 288 | interrupts = <71>; |
53d91034 | 289 | status = "disabled"; |
5fc0b42a AC |
290 | }; |
291 | ||
b918e2c0 | 292 | i2c2: i2c@4819c000 { |
5fc0b42a AC |
293 | compatible = "ti,omap4-i2c"; |
294 | #address-cells = <1>; | |
295 | #size-cells = <0>; | |
296 | ti,hwmods = "i2c3"; | |
4462b31c | 297 | reg = <0x4819c000 0x1000>; |
4462b31c | 298 | interrupts = <30>; |
53d91034 | 299 | status = "disabled"; |
5fc0b42a | 300 | }; |
5f789ebc | 301 | |
55b4452b MP |
302 | mmc1: mmc@48060000 { |
303 | compatible = "ti,omap4-hsmmc"; | |
304 | ti,hwmods = "mmc1"; | |
305 | ti,dual-volt; | |
306 | ti,needs-special-reset; | |
307 | ti,needs-special-hs-handling; | |
308 | dmas = <&edma 24 | |
309 | &edma 25>; | |
310 | dma-names = "tx", "rx"; | |
311 | interrupts = <64>; | |
312 | interrupt-parent = <&intc>; | |
313 | reg = <0x48060000 0x1000>; | |
314 | status = "disabled"; | |
315 | }; | |
316 | ||
317 | mmc2: mmc@481d8000 { | |
318 | compatible = "ti,omap4-hsmmc"; | |
319 | ti,hwmods = "mmc2"; | |
320 | ti,needs-special-reset; | |
321 | dmas = <&edma 2 | |
322 | &edma 3>; | |
323 | dma-names = "tx", "rx"; | |
324 | interrupts = <28>; | |
325 | interrupt-parent = <&intc>; | |
326 | reg = <0x481d8000 0x1000>; | |
327 | status = "disabled"; | |
328 | }; | |
329 | ||
330 | mmc3: mmc@47810000 { | |
331 | compatible = "ti,omap4-hsmmc"; | |
332 | ti,hwmods = "mmc3"; | |
333 | ti,needs-special-reset; | |
334 | interrupts = <29>; | |
335 | interrupt-parent = <&intc>; | |
336 | reg = <0x47810000 0x1000>; | |
337 | status = "disabled"; | |
338 | }; | |
339 | ||
d4cbe80d SA |
340 | hwspinlock: spinlock@480ca000 { |
341 | compatible = "ti,omap4-hwspinlock"; | |
342 | reg = <0x480ca000 0x1000>; | |
343 | ti,hwmods = "spinlock"; | |
34054213 | 344 | #hwlock-cells = <1>; |
d4cbe80d SA |
345 | }; |
346 | ||
5f789ebc AM |
347 | wdt2: wdt@44e35000 { |
348 | compatible = "ti,omap3-wdt"; | |
349 | ti,hwmods = "wd_timer2"; | |
4462b31c | 350 | reg = <0x44e35000 0x1000>; |
4462b31c | 351 | interrupts = <91>; |
5f789ebc | 352 | }; |
059b185d | 353 | |
e23aabc6 RQ |
354 | dcan0: can@481cc000 { |
355 | compatible = "ti,am3352-d_can"; | |
059b185d | 356 | ti,hwmods = "d_can0"; |
e23aabc6 RQ |
357 | reg = <0x481cc000 0x2000>; |
358 | clocks = <&dcan0_fck>; | |
359 | clock-names = "fck"; | |
e3bc5358 | 360 | syscon-raminit = <&scm_conf 0x644 0>; |
059b185d | 361 | interrupts = <52>; |
059b185d AC |
362 | status = "disabled"; |
363 | }; | |
364 | ||
e23aabc6 RQ |
365 | dcan1: can@481d0000 { |
366 | compatible = "ti,am3352-d_can"; | |
059b185d | 367 | ti,hwmods = "d_can1"; |
e23aabc6 RQ |
368 | reg = <0x481d0000 0x2000>; |
369 | clocks = <&dcan1_fck>; | |
370 | clock-names = "fck"; | |
e3bc5358 | 371 | syscon-raminit = <&scm_conf 0x644 1>; |
059b185d | 372 | interrupts = <55>; |
059b185d AC |
373 | status = "disabled"; |
374 | }; | |
fab8ad0b | 375 | |
40242301 SA |
376 | mailbox: mailbox@480C8000 { |
377 | compatible = "ti,omap4-mailbox"; | |
378 | reg = <0x480C8000 0x200>; | |
379 | interrupts = <77>; | |
380 | ti,hwmods = "mailbox"; | |
24df0453 | 381 | #mbox-cells = <1>; |
40242301 SA |
382 | ti,mbox-num-users = <4>; |
383 | ti,mbox-num-fifos = <8>; | |
d27704d1 SA |
384 | mbox_wkupm3: wkup_m3 { |
385 | ti,mbox-tx = <0 0 0>; | |
386 | ti,mbox-rx = <0 0 3>; | |
387 | }; | |
40242301 SA |
388 | }; |
389 | ||
fab8ad0b | 390 | timer1: timer@44e31000 { |
002e1ec5 | 391 | compatible = "ti,am335x-timer-1ms"; |
fab8ad0b JH |
392 | reg = <0x44e31000 0x400>; |
393 | interrupts = <67>; | |
394 | ti,hwmods = "timer1"; | |
395 | ti,timer-alwon; | |
396 | }; | |
397 | ||
398 | timer2: timer@48040000 { | |
002e1ec5 | 399 | compatible = "ti,am335x-timer"; |
fab8ad0b JH |
400 | reg = <0x48040000 0x400>; |
401 | interrupts = <68>; | |
402 | ti,hwmods = "timer2"; | |
403 | }; | |
404 | ||
405 | timer3: timer@48042000 { | |
002e1ec5 | 406 | compatible = "ti,am335x-timer"; |
fab8ad0b JH |
407 | reg = <0x48042000 0x400>; |
408 | interrupts = <69>; | |
409 | ti,hwmods = "timer3"; | |
410 | }; | |
411 | ||
412 | timer4: timer@48044000 { | |
002e1ec5 | 413 | compatible = "ti,am335x-timer"; |
fab8ad0b JH |
414 | reg = <0x48044000 0x400>; |
415 | interrupts = <92>; | |
416 | ti,hwmods = "timer4"; | |
417 | ti,timer-pwm; | |
418 | }; | |
419 | ||
420 | timer5: timer@48046000 { | |
002e1ec5 | 421 | compatible = "ti,am335x-timer"; |
fab8ad0b JH |
422 | reg = <0x48046000 0x400>; |
423 | interrupts = <93>; | |
424 | ti,hwmods = "timer5"; | |
425 | ti,timer-pwm; | |
426 | }; | |
427 | ||
428 | timer6: timer@48048000 { | |
002e1ec5 | 429 | compatible = "ti,am335x-timer"; |
fab8ad0b JH |
430 | reg = <0x48048000 0x400>; |
431 | interrupts = <94>; | |
432 | ti,hwmods = "timer6"; | |
433 | ti,timer-pwm; | |
434 | }; | |
435 | ||
436 | timer7: timer@4804a000 { | |
002e1ec5 | 437 | compatible = "ti,am335x-timer"; |
fab8ad0b JH |
438 | reg = <0x4804a000 0x400>; |
439 | interrupts = <95>; | |
440 | ti,hwmods = "timer7"; | |
441 | ti,timer-pwm; | |
442 | }; | |
0d935c16 | 443 | |
ccd8b9e0 | 444 | rtc: rtc@44e3e000 { |
6ac7b4a2 | 445 | compatible = "ti,am3352-rtc", "ti,da830-rtc"; |
0d935c16 AM |
446 | reg = <0x44e3e000 0x1000>; |
447 | interrupts = <75 | |
448 | 76>; | |
449 | ti,hwmods = "rtc"; | |
450 | }; | |
9fd3c748 PA |
451 | |
452 | spi0: spi@48030000 { | |
453 | compatible = "ti,omap4-mcspi"; | |
454 | #address-cells = <1>; | |
455 | #size-cells = <0>; | |
456 | reg = <0x48030000 0x400>; | |
7b3754c6 | 457 | interrupts = <65>; |
9fd3c748 PA |
458 | ti,spi-num-cs = <2>; |
459 | ti,hwmods = "spi0"; | |
f5e2f807 MP |
460 | dmas = <&edma 16 |
461 | &edma 17 | |
462 | &edma 18 | |
463 | &edma 19>; | |
464 | dma-names = "tx0", "rx0", "tx1", "rx1"; | |
9fd3c748 PA |
465 | status = "disabled"; |
466 | }; | |
467 | ||
468 | spi1: spi@481a0000 { | |
469 | compatible = "ti,omap4-mcspi"; | |
470 | #address-cells = <1>; | |
471 | #size-cells = <0>; | |
472 | reg = <0x481a0000 0x400>; | |
7b3754c6 | 473 | interrupts = <125>; |
9fd3c748 PA |
474 | ti,spi-num-cs = <2>; |
475 | ti,hwmods = "spi1"; | |
f5e2f807 MP |
476 | dmas = <&edma 42 |
477 | &edma 43 | |
478 | &edma 44 | |
479 | &edma 45>; | |
480 | dma-names = "tx0", "rx0", "tx1", "rx1"; | |
9fd3c748 PA |
481 | status = "disabled"; |
482 | }; | |
35b47fbb | 483 | |
97238b35 SAS |
484 | usb: usb@47400000 { |
485 | compatible = "ti,am33xx-usb"; | |
486 | reg = <0x47400000 0x1000>; | |
487 | ranges; | |
488 | #address-cells = <1>; | |
489 | #size-cells = <1>; | |
35b47fbb | 490 | ti,hwmods = "usb_otg_hs"; |
97238b35 SAS |
491 | status = "disabled"; |
492 | ||
8abcdd68 | 493 | usb_ctrl_mod: control@44e10620 { |
97238b35 SAS |
494 | compatible = "ti,am335x-usb-ctrl-module"; |
495 | reg = <0x44e10620 0x10 | |
496 | 0x44e10648 0x4>; | |
497 | reg-names = "phy_ctrl", "wakeup"; | |
498 | status = "disabled"; | |
499 | }; | |
500 | ||
c031a7d4 | 501 | usb0_phy: usb-phy@47401300 { |
97238b35 SAS |
502 | compatible = "ti,am335x-usb-phy"; |
503 | reg = <0x47401300 0x100>; | |
504 | reg-names = "phy"; | |
505 | status = "disabled"; | |
e7243b76 | 506 | ti,ctrl_mod = <&usb_ctrl_mod>; |
97238b35 SAS |
507 | }; |
508 | ||
509 | usb0: usb@47401000 { | |
510 | compatible = "ti,musb-am33xx"; | |
97238b35 | 511 | status = "disabled"; |
c031a7d4 SAS |
512 | reg = <0x47401400 0x400 |
513 | 0x47401000 0x200>; | |
514 | reg-names = "mc", "control"; | |
515 | ||
516 | interrupts = <18>; | |
517 | interrupt-names = "mc"; | |
518 | dr_mode = "otg"; | |
519 | mentor,multipoint = <1>; | |
520 | mentor,num-eps = <16>; | |
521 | mentor,ram-bits = <12>; | |
522 | mentor,power = <500>; | |
523 | phys = <&usb0_phy>; | |
9b3452d1 SAS |
524 | |
525 | dmas = <&cppi41dma 0 0 &cppi41dma 1 0 | |
526 | &cppi41dma 2 0 &cppi41dma 3 0 | |
527 | &cppi41dma 4 0 &cppi41dma 5 0 | |
528 | &cppi41dma 6 0 &cppi41dma 7 0 | |
529 | &cppi41dma 8 0 &cppi41dma 9 0 | |
530 | &cppi41dma 10 0 &cppi41dma 11 0 | |
531 | &cppi41dma 12 0 &cppi41dma 13 0 | |
532 | &cppi41dma 14 0 &cppi41dma 0 1 | |
533 | &cppi41dma 1 1 &cppi41dma 2 1 | |
534 | &cppi41dma 3 1 &cppi41dma 4 1 | |
535 | &cppi41dma 5 1 &cppi41dma 6 1 | |
536 | &cppi41dma 7 1 &cppi41dma 8 1 | |
537 | &cppi41dma 9 1 &cppi41dma 10 1 | |
538 | &cppi41dma 11 1 &cppi41dma 12 1 | |
539 | &cppi41dma 13 1 &cppi41dma 14 1>; | |
540 | dma-names = | |
541 | "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", | |
542 | "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", | |
543 | "rx14", "rx15", | |
544 | "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", | |
545 | "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", | |
546 | "tx14", "tx15"; | |
97238b35 SAS |
547 | }; |
548 | ||
c031a7d4 | 549 | usb1_phy: usb-phy@47401b00 { |
97238b35 SAS |
550 | compatible = "ti,am335x-usb-phy"; |
551 | reg = <0x47401b00 0x100>; | |
552 | reg-names = "phy"; | |
553 | status = "disabled"; | |
e7243b76 | 554 | ti,ctrl_mod = <&usb_ctrl_mod>; |
97238b35 SAS |
555 | }; |
556 | ||
557 | usb1: usb@47401800 { | |
558 | compatible = "ti,musb-am33xx"; | |
97238b35 | 559 | status = "disabled"; |
c031a7d4 SAS |
560 | reg = <0x47401c00 0x400 |
561 | 0x47401800 0x200>; | |
562 | reg-names = "mc", "control"; | |
563 | interrupts = <19>; | |
564 | interrupt-names = "mc"; | |
565 | dr_mode = "otg"; | |
566 | mentor,multipoint = <1>; | |
567 | mentor,num-eps = <16>; | |
568 | mentor,ram-bits = <12>; | |
569 | mentor,power = <500>; | |
570 | phys = <&usb1_phy>; | |
9b3452d1 SAS |
571 | |
572 | dmas = <&cppi41dma 15 0 &cppi41dma 16 0 | |
573 | &cppi41dma 17 0 &cppi41dma 18 0 | |
574 | &cppi41dma 19 0 &cppi41dma 20 0 | |
575 | &cppi41dma 21 0 &cppi41dma 22 0 | |
576 | &cppi41dma 23 0 &cppi41dma 24 0 | |
577 | &cppi41dma 25 0 &cppi41dma 26 0 | |
578 | &cppi41dma 27 0 &cppi41dma 28 0 | |
579 | &cppi41dma 29 0 &cppi41dma 15 1 | |
580 | &cppi41dma 16 1 &cppi41dma 17 1 | |
581 | &cppi41dma 18 1 &cppi41dma 19 1 | |
582 | &cppi41dma 20 1 &cppi41dma 21 1 | |
583 | &cppi41dma 22 1 &cppi41dma 23 1 | |
584 | &cppi41dma 24 1 &cppi41dma 25 1 | |
585 | &cppi41dma 26 1 &cppi41dma 27 1 | |
586 | &cppi41dma 28 1 &cppi41dma 29 1>; | |
587 | dma-names = | |
588 | "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", | |
589 | "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", | |
590 | "rx14", "rx15", | |
591 | "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", | |
592 | "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", | |
593 | "tx14", "tx15"; | |
97238b35 | 594 | }; |
9b3452d1 | 595 | |
8abcdd68 | 596 | cppi41dma: dma-controller@47402000 { |
9b3452d1 SAS |
597 | compatible = "ti,am3359-cppi41"; |
598 | reg = <0x47400000 0x1000 | |
599 | 0x47402000 0x1000 | |
600 | 0x47403000 0x1000 | |
601 | 0x47404000 0x4000>; | |
3b6394b4 | 602 | reg-names = "glue", "controller", "scheduler", "queuemgr"; |
9b3452d1 SAS |
603 | interrupts = <17>; |
604 | interrupt-names = "glue"; | |
605 | #dma-cells = <2>; | |
606 | #dma-channels = <30>; | |
607 | #dma-requests = <256>; | |
608 | status = "disabled"; | |
609 | }; | |
35b47fbb | 610 | }; |
6be35c70 | 611 | |
0a7486c9 PA |
612 | epwmss0: epwmss@48300000 { |
613 | compatible = "ti,am33xx-pwmss"; | |
614 | reg = <0x48300000 0x10>; | |
615 | ti,hwmods = "epwmss0"; | |
616 | #address-cells = <1>; | |
617 | #size-cells = <1>; | |
618 | status = "disabled"; | |
619 | ranges = <0x48300100 0x48300100 0x80 /* ECAP */ | |
620 | 0x48300180 0x48300180 0x80 /* EQEP */ | |
621 | 0x48300200 0x48300200 0x80>; /* EHRPWM */ | |
622 | ||
623 | ecap0: ecap@48300100 { | |
624 | compatible = "ti,am33xx-ecap"; | |
625 | #pwm-cells = <3>; | |
626 | reg = <0x48300100 0x80>; | |
e8c85a3e MP |
627 | interrupts = <31>; |
628 | interrupt-names = "ecap0"; | |
0a7486c9 PA |
629 | ti,hwmods = "ecap0"; |
630 | status = "disabled"; | |
631 | }; | |
632 | ||
633 | ehrpwm0: ehrpwm@48300200 { | |
634 | compatible = "ti,am33xx-ehrpwm"; | |
635 | #pwm-cells = <3>; | |
636 | reg = <0x48300200 0x80>; | |
637 | ti,hwmods = "ehrpwm0"; | |
638 | status = "disabled"; | |
639 | }; | |
640 | }; | |
641 | ||
642 | epwmss1: epwmss@48302000 { | |
643 | compatible = "ti,am33xx-pwmss"; | |
644 | reg = <0x48302000 0x10>; | |
645 | ti,hwmods = "epwmss1"; | |
646 | #address-cells = <1>; | |
647 | #size-cells = <1>; | |
648 | status = "disabled"; | |
649 | ranges = <0x48302100 0x48302100 0x80 /* ECAP */ | |
650 | 0x48302180 0x48302180 0x80 /* EQEP */ | |
651 | 0x48302200 0x48302200 0x80>; /* EHRPWM */ | |
652 | ||
653 | ecap1: ecap@48302100 { | |
654 | compatible = "ti,am33xx-ecap"; | |
655 | #pwm-cells = <3>; | |
656 | reg = <0x48302100 0x80>; | |
e8c85a3e MP |
657 | interrupts = <47>; |
658 | interrupt-names = "ecap1"; | |
0a7486c9 PA |
659 | ti,hwmods = "ecap1"; |
660 | status = "disabled"; | |
661 | }; | |
662 | ||
663 | ehrpwm1: ehrpwm@48302200 { | |
664 | compatible = "ti,am33xx-ehrpwm"; | |
665 | #pwm-cells = <3>; | |
666 | reg = <0x48302200 0x80>; | |
667 | ti,hwmods = "ehrpwm1"; | |
668 | status = "disabled"; | |
669 | }; | |
670 | }; | |
671 | ||
672 | epwmss2: epwmss@48304000 { | |
673 | compatible = "ti,am33xx-pwmss"; | |
674 | reg = <0x48304000 0x10>; | |
675 | ti,hwmods = "epwmss2"; | |
676 | #address-cells = <1>; | |
677 | #size-cells = <1>; | |
678 | status = "disabled"; | |
679 | ranges = <0x48304100 0x48304100 0x80 /* ECAP */ | |
680 | 0x48304180 0x48304180 0x80 /* EQEP */ | |
681 | 0x48304200 0x48304200 0x80>; /* EHRPWM */ | |
682 | ||
683 | ecap2: ecap@48304100 { | |
684 | compatible = "ti,am33xx-ecap"; | |
685 | #pwm-cells = <3>; | |
686 | reg = <0x48304100 0x80>; | |
e8c85a3e MP |
687 | interrupts = <61>; |
688 | interrupt-names = "ecap2"; | |
0a7486c9 PA |
689 | ti,hwmods = "ecap2"; |
690 | status = "disabled"; | |
691 | }; | |
692 | ||
693 | ehrpwm2: ehrpwm@48304200 { | |
694 | compatible = "ti,am33xx-ehrpwm"; | |
695 | #pwm-cells = <3>; | |
696 | reg = <0x48304200 0x80>; | |
697 | ti,hwmods = "ehrpwm2"; | |
698 | status = "disabled"; | |
699 | }; | |
700 | }; | |
701 | ||
1a39a65c M |
702 | mac: ethernet@4a100000 { |
703 | compatible = "ti,cpsw"; | |
704 | ti,hwmods = "cpgmac0"; | |
0987a6ef GC |
705 | clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>; |
706 | clock-names = "fck", "cpts"; | |
1a39a65c M |
707 | cpdma_channels = <8>; |
708 | ale_entries = <1024>; | |
709 | bd_ram_size = <0x2000>; | |
710 | no_bd_ram = <0>; | |
711 | rx_descs = <64>; | |
712 | mac_control = <0x20>; | |
713 | slaves = <2>; | |
e86ac13b | 714 | active_slave = <0>; |
1a39a65c M |
715 | cpts_clock_mult = <0x80000000>; |
716 | cpts_clock_shift = <29>; | |
717 | reg = <0x4a100000 0x800 | |
718 | 0x4a101200 0x100>; | |
719 | #address-cells = <1>; | |
720 | #size-cells = <1>; | |
721 | interrupt-parent = <&intc>; | |
722 | /* | |
723 | * c0_rx_thresh_pend | |
724 | * c0_rx_pend | |
725 | * c0_tx_pend | |
726 | * c0_misc_pend | |
727 | */ | |
728 | interrupts = <40 41 42 43>; | |
729 | ranges; | |
e3bc5358 | 730 | syscon = <&scm_conf>; |
16c75a13 | 731 | status = "disabled"; |
1a39a65c M |
732 | |
733 | davinci_mdio: mdio@4a101000 { | |
734 | compatible = "ti,davinci_mdio"; | |
735 | #address-cells = <1>; | |
736 | #size-cells = <0>; | |
737 | ti,hwmods = "davinci_mdio"; | |
738 | bus_freq = <1000000>; | |
739 | reg = <0x4a101000 0x100>; | |
16c75a13 | 740 | status = "disabled"; |
1a39a65c M |
741 | }; |
742 | ||
743 | cpsw_emac0: slave@4a100200 { | |
744 | /* Filled in by U-Boot */ | |
745 | mac-address = [ 00 00 00 00 00 00 ]; | |
746 | }; | |
747 | ||
748 | cpsw_emac1: slave@4a100300 { | |
749 | /* Filled in by U-Boot */ | |
750 | mac-address = [ 00 00 00 00 00 00 ]; | |
751 | }; | |
39ffbd91 M |
752 | |
753 | phy_sel: cpsw-phy-sel@44e10650 { | |
754 | compatible = "ti,am3352-cpsw-phy-sel"; | |
755 | reg= <0x44e10650 0x4>; | |
756 | reg-names = "gmii-sel"; | |
757 | }; | |
1a39a65c | 758 | }; |
f6575c90 VB |
759 | |
760 | ocmcram: ocmcram@40300000 { | |
8b9a2810 RN |
761 | compatible = "mmio-sram"; |
762 | reg = <0x40300000 0x10000>; /* 64k */ | |
f6575c90 VB |
763 | }; |
764 | ||
765 | wkup_m3: wkup_m3@44d00000 { | |
766 | compatible = "ti,am3353-wkup-m3"; | |
767 | reg = <0x44d00000 0x4000 /* M3 UMEM */ | |
768 | 0x44d80000 0x2000>; /* M3 DMEM */ | |
769 | ti,hwmods = "wkup_m3"; | |
f12ecbe2 | 770 | ti,no-reset-on-init; |
f6575c90 | 771 | }; |
e45879ec | 772 | |
15e8246b PA |
773 | elm: elm@48080000 { |
774 | compatible = "ti,am3352-elm"; | |
775 | reg = <0x48080000 0x2000>; | |
776 | interrupts = <4>; | |
777 | ti,hwmods = "elm"; | |
d6cfc1e2 BP |
778 | status = "disabled"; |
779 | }; | |
780 | ||
781 | lcdc: lcdc@4830e000 { | |
782 | compatible = "ti,am33xx-tilcdc"; | |
783 | reg = <0x4830e000 0x1000>; | |
784 | interrupt-parent = <&intc>; | |
785 | interrupts = <36>; | |
786 | ti,hwmods = "lcdc"; | |
15e8246b PA |
787 | status = "disabled"; |
788 | }; | |
789 | ||
a82279dd PR |
790 | tscadc: tscadc@44e0d000 { |
791 | compatible = "ti,am3359-tscadc"; | |
792 | reg = <0x44e0d000 0x1000>; | |
793 | interrupt-parent = <&intc>; | |
794 | interrupts = <16>; | |
795 | ti,hwmods = "adc_tsc"; | |
796 | status = "disabled"; | |
797 | ||
798 | tsc { | |
799 | compatible = "ti,am3359-tsc"; | |
800 | }; | |
801 | am335x_adc: adc { | |
802 | #io-channel-cells = <1>; | |
803 | compatible = "ti,am3359-adc"; | |
804 | }; | |
a82279dd PR |
805 | }; |
806 | ||
e45879ec PA |
807 | gpmc: gpmc@50000000 { |
808 | compatible = "ti,am3352-gpmc"; | |
809 | ti,hwmods = "gpmc"; | |
f12ecbe2 | 810 | ti,no-idle-on-init; |
e45879ec PA |
811 | reg = <0x50000000 0x2000>; |
812 | interrupts = <100>; | |
00dddcaa LP |
813 | gpmc,num-cs = <7>; |
814 | gpmc,num-waitpins = <2>; | |
e45879ec PA |
815 | #address-cells = <2>; |
816 | #size-cells = <1>; | |
817 | status = "disabled"; | |
818 | }; | |
f8302e1e MG |
819 | |
820 | sham: sham@53100000 { | |
821 | compatible = "ti,omap4-sham"; | |
822 | ti,hwmods = "sham"; | |
823 | reg = <0x53100000 0x200>; | |
824 | interrupts = <109>; | |
825 | dmas = <&edma 36>; | |
826 | dma-names = "rx"; | |
827 | }; | |
99919e5e MG |
828 | |
829 | aes: aes@53500000 { | |
830 | compatible = "ti,omap4-aes"; | |
831 | ti,hwmods = "aes"; | |
832 | reg = <0x53500000 0xa0>; | |
7af8884a | 833 | interrupts = <103>; |
99919e5e MG |
834 | dmas = <&edma 6>, |
835 | <&edma 5>; | |
836 | dma-names = "tx", "rx"; | |
837 | }; | |
3f72f875 PA |
838 | |
839 | mcasp0: mcasp@48038000 { | |
840 | compatible = "ti,am33xx-mcasp-audio"; | |
841 | ti,hwmods = "mcasp0"; | |
0bee55ab JS |
842 | reg = <0x48038000 0x2000>, |
843 | <0x46000000 0x400000>; | |
844 | reg-names = "mpu", "dat"; | |
3f72f875 | 845 | interrupts = <80>, <81>; |
ae107d06 | 846 | interrupt-names = "tx", "rx"; |
3f72f875 PA |
847 | status = "disabled"; |
848 | dmas = <&edma 8>, | |
849 | <&edma 9>; | |
850 | dma-names = "tx", "rx"; | |
851 | }; | |
852 | ||
853 | mcasp1: mcasp@4803C000 { | |
854 | compatible = "ti,am33xx-mcasp-audio"; | |
855 | ti,hwmods = "mcasp1"; | |
0bee55ab JS |
856 | reg = <0x4803C000 0x2000>, |
857 | <0x46400000 0x400000>; | |
858 | reg-names = "mpu", "dat"; | |
3f72f875 | 859 | interrupts = <82>, <83>; |
ae107d06 | 860 | interrupt-names = "tx", "rx"; |
3f72f875 PA |
861 | status = "disabled"; |
862 | dmas = <&edma 10>, | |
863 | <&edma 11>; | |
864 | dma-names = "tx", "rx"; | |
865 | }; | |
ed845d6b LV |
866 | |
867 | rng: rng@48310000 { | |
868 | compatible = "ti,omap4-rng"; | |
869 | ti,hwmods = "rng"; | |
870 | reg = <0x48310000 0x2000>; | |
871 | interrupts = <111>; | |
872 | }; | |
5fc0b42a AC |
873 | }; |
874 | }; | |
ea291c98 TK |
875 | |
876 | /include/ "am33xx-clocks.dtsi" |