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Linux 3.15-rc2
[linux-2.6-block.git] / arch / arm / boot / dts / am33xx.dtsi
CommitLineData
5fc0b42a
AC		 1/*
2 * Device Tree Source for AM33XX SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
e94233c2 11#include <dt-bindings/gpio/gpio.h>
6a8a6b65 12#include <dt-bindings/pinctrl/am33xx.h>
e94233c2 13
eb33ef66 14#include "skeleton.dtsi"
5fc0b42a
AC		 15
16/ {
17 compatible = "ti,am33xx";
4c94ac29 18 interrupt-parent = <&intc>;
5fc0b42a
AC		 19
20 aliases {
6a968678
NM		 21 i2c0 = &i2c0;
22 i2c1 = &i2c1;
23 i2c2 = &i2c2;
dde3b0d6
VH		 24 serial0 = &uart0;
25 serial1 = &uart1;
26 serial2 = &uart2;
27 serial3 = &uart3;
28 serial4 = &uart4;
29 serial5 = &uart5;
7a57ee87
AC		 30 d_can0 = &dcan0;
31 d_can1 = &dcan1;
97238b35
SAS		 32 usb0 = &usb0;
33 usb1 = &usb1;
34 phy0 = &usb0_phy;
35 phy1 = &usb1_phy;
8170056d
DM		 36 ethernet0 = &cpsw_emac0;
37 ethernet1 = &cpsw_emac1;
5fc0b42a
AC		 38 };
39
40 cpus {
2e0d513f
LP		 41 #address-cells = <1>;
42 #size-cells = <0>;
5fc0b42a
AC		 43 cpu@0 {
44 compatible = "arm,cortex-a8";
2e0d513f
LP		 45 device_type = "cpu";
46 reg = <0>;
efeedcf2
AC		 47
48 /*
49 * To consider voltage drop between PMIC and SoC,
50 * tolerance value is reduced to 2% from 4% and
51 * voltage value is increased as a precaution.
52 */
53 operating-points = <
54 /* kHz uV */
55 720000 1285000
56 600000 1225000
57 500000 1125000
58 275000 1125000
59 >;
60 voltage-tolerance = <2>; /* 2 percentage */
8d766fa2
NM		 61
62 clocks = <&dpll_mpu_ck>;
63 clock-names = "cpu";
64
efeedcf2 65 clock-latency = <300000>; /* From omap-cpufreq driver */
5fc0b42a
AC		 66 };
67 };
68
6797cdbe
AB		 69 pmu {
70 compatible = "arm,cortex-a8-pmu";
71 interrupts = <3>;
72 };
73
5fc0b42a
AC		 74 /*
75 * The soc node represents the soc top level view. It is uses for IPs
76 * that are not memory mapped in the MPU view or for the MPU itself.
77 */
78 soc {
79 compatible = "ti,omap-infra";
80 mpu {
81 compatible = "ti,omap3-mpu";
82 ti,hwmods = "mpu";
83 };
84 };
85
b552dfc4
AC		 86 am33xx_pinmux: pinmux@44e10800 {
87 compatible = "pinctrl-single";
88 reg = <0x44e10800 0x0238>;
89 #address-cells = <1>;
90 #size-cells = <0>;
91 pinctrl-single,register-width = <32>;
92 pinctrl-single,function-mask = <0x7f>;
93 };
94
5fc0b42a
AC		 95 /*
96 * XXX: Use a flat representation of the AM33XX interconnect.
97 * The real AM33XX interconnect network is quite complex.Since
98 * that will not bring real advantage to represent that in DT
99 * for the moment, just use a fake OCP bus entry to represent
100 * the whole bus hierarchy.
101 */
102 ocp {
103 compatible = "simple-bus";
104 #address-cells = <1>;
105 #size-cells = <1>;
106 ranges;
107 ti,hwmods = "l3_main";
108
ea291c98
TK		 109 prcm: prcm@44e00000 {
110 compatible = "ti,am3-prcm";
111 reg = <0x44e00000 0x4000>;
112
113 prcm_clocks: clocks {
114 #address-cells = <1>;
115 #size-cells = <0>;
116 };
117
118 prcm_clockdomains: clockdomains {
119 };
120 };
121
122 scrm: scrm@44e10000 {
123 compatible = "ti,am3-scrm";
124 reg = <0x44e10000 0x2000>;
125
126 scrm_clocks: clocks {
127 #address-cells = <1>;
128 #size-cells = <0>;
129 };
130
131 scrm_clockdomains: clockdomains {
132 };
133 };
134
5fc0b42a
AC		 135 intc: interrupt-controller@48200000 {
136 compatible = "ti,omap2-intc";
137 interrupt-controller;
138 #interrupt-cells = <1>;
139 ti,intc-size = <128>;
140 reg = <0x48200000 0x1000>;
141 };
142
505975d3
MP		 143 edma: edma@49000000 {
144 compatible = "ti,edma3";
145 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
146 reg = <0x49000000 0x10000>,
147 <0x44e10f90 0x10>;
148 interrupts = <12 13 14>;
149 #dma-cells = <1>;
150 dma-channels = <64>;
151 ti,edma-regions = <4>;
152 ti,edma-slots = <256>;
153 };
154
b918e2c0 155 gpio0: gpio@44e07000 {
5fc0b42a
AC		 156 compatible = "ti,omap4-gpio";
157 ti,hwmods = "gpio1";
158 gpio-controller;
159 #gpio-cells = <2>;
160 interrupt-controller;
5eac0eb7 161 #interrupt-cells = <2>;
4462b31c 162 reg = <0x44e07000 0x1000>;
4462b31c 163 interrupts = <96>;
5fc0b42a
AC		 164 };
165
b918e2c0 166 gpio1: gpio@4804c000 {
5fc0b42a
AC		 167 compatible = "ti,omap4-gpio";
168 ti,hwmods = "gpio2";
169 gpio-controller;
170 #gpio-cells = <2>;
171 interrupt-controller;
5eac0eb7 172 #interrupt-cells = <2>;
4462b31c 173 reg = <0x4804c000 0x1000>;
4462b31c 174 interrupts = <98>;
5fc0b42a
AC		 175 };
176
b918e2c0 177 gpio2: gpio@481ac000 {
5fc0b42a
AC		 178 compatible = "ti,omap4-gpio";
179 ti,hwmods = "gpio3";
180 gpio-controller;
181 #gpio-cells = <2>;
182 interrupt-controller;
5eac0eb7 183 #interrupt-cells = <2>;
4462b31c 184 reg = <0x481ac000 0x1000>;
4462b31c 185 interrupts = <32>;
5fc0b42a
AC		 186 };
187
b918e2c0 188 gpio3: gpio@481ae000 {
5fc0b42a
AC		 189 compatible = "ti,omap4-gpio";
190 ti,hwmods = "gpio4";
191 gpio-controller;
192 #gpio-cells = <2>;
193 interrupt-controller;
5eac0eb7 194 #interrupt-cells = <2>;
4462b31c 195 reg = <0x481ae000 0x1000>;
4462b31c 196 interrupts = <62>;
5fc0b42a
AC		 197 };
198
dde3b0d6 199 uart0: serial@44e09000 {
5fc0b42a
AC		 200 compatible = "ti,omap3-uart";
201 ti,hwmods = "uart1";
202 clock-frequency = <48000000>;
4462b31c 203 reg = <0x44e09000 0x2000>;
4462b31c 204 interrupts = <72>;
53d91034 205 status = "disabled";
5fc0b42a
AC		 206 };
207
dde3b0d6 208 uart1: serial@48022000 {
5fc0b42a
AC		 209 compatible = "ti,omap3-uart";
210 ti,hwmods = "uart2";
211 clock-frequency = <48000000>;
4462b31c 212 reg = <0x48022000 0x2000>;
4462b31c 213 interrupts = <73>;
53d91034 214 status = "disabled";
5fc0b42a
AC		 215 };
216
dde3b0d6 217 uart2: serial@48024000 {
5fc0b42a
AC		 218 compatible = "ti,omap3-uart";
219 ti,hwmods = "uart3";
220 clock-frequency = <48000000>;
4462b31c 221 reg = <0x48024000 0x2000>;
4462b31c 222 interrupts = <74>;
53d91034 223 status = "disabled";
5fc0b42a
AC		 224 };
225
dde3b0d6 226 uart3: serial@481a6000 {
5fc0b42a
AC		 227 compatible = "ti,omap3-uart";
228 ti,hwmods = "uart4";
229 clock-frequency = <48000000>;
4462b31c 230 reg = <0x481a6000 0x2000>;
4462b31c 231 interrupts = <44>;
53d91034 232 status = "disabled";
5fc0b42a
AC		 233 };
234
dde3b0d6 235 uart4: serial@481a8000 {
5fc0b42a
AC		 236 compatible = "ti,omap3-uart";
237 ti,hwmods = "uart5";
238 clock-frequency = <48000000>;
4462b31c 239 reg = <0x481a8000 0x2000>;
4462b31c 240 interrupts = <45>;
53d91034 241 status = "disabled";
5fc0b42a
AC		 242 };
243
dde3b0d6 244 uart5: serial@481aa000 {
5fc0b42a
AC		 245 compatible = "ti,omap3-uart";
246 ti,hwmods = "uart6";
247 clock-frequency = <48000000>;
4462b31c 248 reg = <0x481aa000 0x2000>;
4462b31c 249 interrupts = <46>;
53d91034 250 status = "disabled";
5fc0b42a
AC		 251 };
252
b918e2c0 253 i2c0: i2c@44e0b000 {
5fc0b42a
AC		 254 compatible = "ti,omap4-i2c";
255 #address-cells = <1>;
256 #size-cells = <0>;
257 ti,hwmods = "i2c1";
4462b31c 258 reg = <0x44e0b000 0x1000>;
4462b31c 259 interrupts = <70>;
53d91034 260 status = "disabled";
5fc0b42a
AC		 261 };
262
b918e2c0 263 i2c1: i2c@4802a000 {
5fc0b42a
AC		 264 compatible = "ti,omap4-i2c";
265 #address-cells = <1>;
266 #size-cells = <0>;
267 ti,hwmods = "i2c2";
4462b31c 268 reg = <0x4802a000 0x1000>;
4462b31c 269 interrupts = <71>;
53d91034 270 status = "disabled";
5fc0b42a
AC		 271 };
272
b918e2c0 273 i2c2: i2c@4819c000 {
5fc0b42a
AC		 274 compatible = "ti,omap4-i2c";
275 #address-cells = <1>;
276 #size-cells = <0>;
277 ti,hwmods = "i2c3";
4462b31c 278 reg = <0x4819c000 0x1000>;
4462b31c 279 interrupts = <30>;
53d91034 280 status = "disabled";
5fc0b42a 281 };
5f789ebc 282
55b4452b
MP		 283 mmc1: mmc@48060000 {
284 compatible = "ti,omap4-hsmmc";
285 ti,hwmods = "mmc1";
286 ti,dual-volt;
287 ti,needs-special-reset;
288 ti,needs-special-hs-handling;
289 dmas = <&edma 24
290 &edma 25>;
291 dma-names = "tx", "rx";
292 interrupts = <64>;
293 interrupt-parent = <&intc>;
294 reg = <0x48060000 0x1000>;
295 status = "disabled";
296 };
297
298 mmc2: mmc@481d8000 {
299 compatible = "ti,omap4-hsmmc";
300 ti,hwmods = "mmc2";
301 ti,needs-special-reset;
302 dmas = <&edma 2
303 &edma 3>;
304 dma-names = "tx", "rx";
305 interrupts = <28>;
306 interrupt-parent = <&intc>;
307 reg = <0x481d8000 0x1000>;
308 status = "disabled";
309 };
310
311 mmc3: mmc@47810000 {
312 compatible = "ti,omap4-hsmmc";
313 ti,hwmods = "mmc3";
314 ti,needs-special-reset;
315 interrupts = <29>;
316 interrupt-parent = <&intc>;
317 reg = <0x47810000 0x1000>;
318 status = "disabled";
319 };
320
d4cbe80d
SA		 321 hwspinlock: spinlock@480ca000 {
322 compatible = "ti,omap4-hwspinlock";
323 reg = <0x480ca000 0x1000>;
324 ti,hwmods = "spinlock";
34054213 325 #hwlock-cells = <1>;
d4cbe80d
SA		 326 };
327
5f789ebc
AM		 328 wdt2: wdt@44e35000 {
329 compatible = "ti,omap3-wdt";
330 ti,hwmods = "wd_timer2";
4462b31c 331 reg = <0x44e35000 0x1000>;
4462b31c 332 interrupts = <91>;
5f789ebc 333 };
059b185d
AC		 334
335 dcan0: d_can@481cc000 {
336 compatible = "bosch,d_can";
337 ti,hwmods = "d_can0";
f178c015
AC		 338 reg = <0x481cc000 0x2000
339 0x44e10644 0x4>;
059b185d 340 interrupts = <52>;
059b185d
AC		 341 status = "disabled";
342 };
343
344 dcan1: d_can@481d0000 {
345 compatible = "bosch,d_can";
346 ti,hwmods = "d_can1";
f178c015
AC		 347 reg = <0x481d0000 0x2000
348 0x44e10644 0x4>;
059b185d 349 interrupts = <55>;
059b185d
AC		 350 status = "disabled";
351 };
fab8ad0b
JH		 352
353 timer1: timer@44e31000 {
002e1ec5 354 compatible = "ti,am335x-timer-1ms";
fab8ad0b
JH		 355 reg = <0x44e31000 0x400>;
356 interrupts = <67>;
357 ti,hwmods = "timer1";
358 ti,timer-alwon;
359 };
360
361 timer2: timer@48040000 {
002e1ec5 362 compatible = "ti,am335x-timer";
fab8ad0b
JH		 363 reg = <0x48040000 0x400>;
364 interrupts = <68>;
365 ti,hwmods = "timer2";
366 };
367
368 timer3: timer@48042000 {
002e1ec5 369 compatible = "ti,am335x-timer";
fab8ad0b
JH		 370 reg = <0x48042000 0x400>;
371 interrupts = <69>;
372 ti,hwmods = "timer3";
373 };
374
375 timer4: timer@48044000 {
002e1ec5 376 compatible = "ti,am335x-timer";
fab8ad0b
JH		 377 reg = <0x48044000 0x400>;
378 interrupts = <92>;
379 ti,hwmods = "timer4";
380 ti,timer-pwm;
381 };
382
383 timer5: timer@48046000 {
002e1ec5 384 compatible = "ti,am335x-timer";
fab8ad0b
JH		 385 reg = <0x48046000 0x400>;
386 interrupts = <93>;
387 ti,hwmods = "timer5";
388 ti,timer-pwm;
389 };
390
391 timer6: timer@48048000 {
002e1ec5 392 compatible = "ti,am335x-timer";
fab8ad0b
JH		 393 reg = <0x48048000 0x400>;
394 interrupts = <94>;
395 ti,hwmods = "timer6";
396 ti,timer-pwm;
397 };
398
399 timer7: timer@4804a000 {
002e1ec5 400 compatible = "ti,am335x-timer";
fab8ad0b
JH		 401 reg = <0x4804a000 0x400>;
402 interrupts = <95>;
403 ti,hwmods = "timer7";
404 ti,timer-pwm;
405 };
0d935c16 406
ccd8b9e0 407 rtc: rtc@44e3e000 {
0d935c16
AM		 408 compatible = "ti,da830-rtc";
409 reg = <0x44e3e000 0x1000>;
410 interrupts = <75
411 76>;
412 ti,hwmods = "rtc";
413 };
9fd3c748
PA		 414
415 spi0: spi@48030000 {
416 compatible = "ti,omap4-mcspi";
417 #address-cells = <1>;
418 #size-cells = <0>;
419 reg = <0x48030000 0x400>;
7b3754c6 420 interrupts = <65>;
9fd3c748
PA		 421 ti,spi-num-cs = <2>;
422 ti,hwmods = "spi0";
f5e2f807
MP		 423 dmas = <&edma 16
424 &edma 17
425 &edma 18
426 &edma 19>;
427 dma-names = "tx0", "rx0", "tx1", "rx1";
9fd3c748
PA		 428 status = "disabled";
429 };
430
431 spi1: spi@481a0000 {
432 compatible = "ti,omap4-mcspi";
433 #address-cells = <1>;
434 #size-cells = <0>;
435 reg = <0x481a0000 0x400>;
7b3754c6 436 interrupts = <125>;
9fd3c748
PA		 437 ti,spi-num-cs = <2>;
438 ti,hwmods = "spi1";
f5e2f807
MP		 439 dmas = <&edma 42
440 &edma 43
441 &edma 44
442 &edma 45>;
443 dma-names = "tx0", "rx0", "tx1", "rx1";
9fd3c748
PA		 444 status = "disabled";
445 };
35b47fbb 446
97238b35
SAS		 447 usb: usb@47400000 {
448 compatible = "ti,am33xx-usb";
449 reg = <0x47400000 0x1000>;
450 ranges;
451 #address-cells = <1>;
452 #size-cells = <1>;
35b47fbb 453 ti,hwmods = "usb_otg_hs";
97238b35
SAS		 454 status = "disabled";
455
8abcdd68 456 usb_ctrl_mod: control@44e10620 {
97238b35
SAS		 457 compatible = "ti,am335x-usb-ctrl-module";
458 reg = <0x44e10620 0x10
459 0x44e10648 0x4>;
460 reg-names = "phy_ctrl", "wakeup";
461 status = "disabled";
462 };
463
c031a7d4 464 usb0_phy: usb-phy@47401300 {
97238b35
SAS		 465 compatible = "ti,am335x-usb-phy";
466 reg = <0x47401300 0x100>;
467 reg-names = "phy";
468 status = "disabled";
e7243b76 469 ti,ctrl_mod = <&usb_ctrl_mod>;
97238b35
SAS		 470 };
471
472 usb0: usb@47401000 {
473 compatible = "ti,musb-am33xx";
97238b35 474 status = "disabled";
c031a7d4
SAS		 475 reg = <0x47401400 0x400
476 0x47401000 0x200>;
477 reg-names = "mc", "control";
478
479 interrupts = <18>;
480 interrupt-names = "mc";
481 dr_mode = "otg";
482 mentor,multipoint = <1>;
483 mentor,num-eps = <16>;
484 mentor,ram-bits = <12>;
485 mentor,power = <500>;
486 phys = <&usb0_phy>;
9b3452d1
SAS		 487
488 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
489 &cppi41dma 2 0 &cppi41dma 3 0
490 &cppi41dma 4 0 &cppi41dma 5 0
491 &cppi41dma 6 0 &cppi41dma 7 0
492 &cppi41dma 8 0 &cppi41dma 9 0
493 &cppi41dma 10 0 &cppi41dma 11 0
494 &cppi41dma 12 0 &cppi41dma 13 0
495 &cppi41dma 14 0 &cppi41dma 0 1
496 &cppi41dma 1 1 &cppi41dma 2 1
497 &cppi41dma 3 1 &cppi41dma 4 1
498 &cppi41dma 5 1 &cppi41dma 6 1
499 &cppi41dma 7 1 &cppi41dma 8 1
500 &cppi41dma 9 1 &cppi41dma 10 1
501 &cppi41dma 11 1 &cppi41dma 12 1
502 &cppi41dma 13 1 &cppi41dma 14 1>;
503 dma-names =
504 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
505 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
506 "rx14", "rx15",
507 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
508 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
509 "tx14", "tx15";
97238b35
SAS		 510 };
511
c031a7d4 512 usb1_phy: usb-phy@47401b00 {
97238b35
SAS		 513 compatible = "ti,am335x-usb-phy";
514 reg = <0x47401b00 0x100>;
515 reg-names = "phy";
516 status = "disabled";
e7243b76 517 ti,ctrl_mod = <&usb_ctrl_mod>;
97238b35
SAS		 518 };
519
520 usb1: usb@47401800 {
521 compatible = "ti,musb-am33xx";
97238b35 522 status = "disabled";
c031a7d4
SAS		 523 reg = <0x47401c00 0x400
524 0x47401800 0x200>;
525 reg-names = "mc", "control";
526 interrupts = <19>;
527 interrupt-names = "mc";
528 dr_mode = "otg";
529 mentor,multipoint = <1>;
530 mentor,num-eps = <16>;
531 mentor,ram-bits = <12>;
532 mentor,power = <500>;
533 phys = <&usb1_phy>;
9b3452d1
SAS		 534
535 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
536 &cppi41dma 17 0 &cppi41dma 18 0
537 &cppi41dma 19 0 &cppi41dma 20 0
538 &cppi41dma 21 0 &cppi41dma 22 0
539 &cppi41dma 23 0 &cppi41dma 24 0
540 &cppi41dma 25 0 &cppi41dma 26 0
541 &cppi41dma 27 0 &cppi41dma 28 0
542 &cppi41dma 29 0 &cppi41dma 15 1
543 &cppi41dma 16 1 &cppi41dma 17 1
544 &cppi41dma 18 1 &cppi41dma 19 1
545 &cppi41dma 20 1 &cppi41dma 21 1
546 &cppi41dma 22 1 &cppi41dma 23 1
547 &cppi41dma 24 1 &cppi41dma 25 1
548 &cppi41dma 26 1 &cppi41dma 27 1
549 &cppi41dma 28 1 &cppi41dma 29 1>;
550 dma-names =
551 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
552 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
553 "rx14", "rx15",
554 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
555 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
556 "tx14", "tx15";
97238b35 557 };
9b3452d1 558
8abcdd68 559 cppi41dma: dma-controller@47402000 {
9b3452d1
SAS		 560 compatible = "ti,am3359-cppi41";
561 reg = <0x47400000 0x1000
562 0x47402000 0x1000
563 0x47403000 0x1000
564 0x47404000 0x4000>;
3b6394b4 565 reg-names = "glue", "controller", "scheduler", "queuemgr";
9b3452d1
SAS		 566 interrupts = <17>;
567 interrupt-names = "glue";
568 #dma-cells = <2>;
569 #dma-channels = <30>;
570 #dma-requests = <256>;
571 status = "disabled";
572 };
35b47fbb 573 };
6be35c70 574
0a7486c9
PA		 575 epwmss0: epwmss@48300000 {
576 compatible = "ti,am33xx-pwmss";
577 reg = <0x48300000 0x10>;
578 ti,hwmods = "epwmss0";
579 #address-cells = <1>;
580 #size-cells = <1>;
581 status = "disabled";
582 ranges = <0x48300100 0x48300100 0x80 /* ECAP */
583 0x48300180 0x48300180 0x80 /* EQEP */
584 0x48300200 0x48300200 0x80>; /* EHRPWM */
585
586 ecap0: ecap@48300100 {
587 compatible = "ti,am33xx-ecap";
588 #pwm-cells = <3>;
589 reg = <0x48300100 0x80>;
e8c85a3e
MP		 590 interrupts = <31>;
591 interrupt-names = "ecap0";
0a7486c9
PA		 592 ti,hwmods = "ecap0";
593 status = "disabled";
594 };
595
596 ehrpwm0: ehrpwm@48300200 {
597 compatible = "ti,am33xx-ehrpwm";
598 #pwm-cells = <3>;
599 reg = <0x48300200 0x80>;
600 ti,hwmods = "ehrpwm0";
601 status = "disabled";
602 };
603 };
604
605 epwmss1: epwmss@48302000 {
606 compatible = "ti,am33xx-pwmss";
607 reg = <0x48302000 0x10>;
608 ti,hwmods = "epwmss1";
609 #address-cells = <1>;
610 #size-cells = <1>;
611 status = "disabled";
612 ranges = <0x48302100 0x48302100 0x80 /* ECAP */
613 0x48302180 0x48302180 0x80 /* EQEP */
614 0x48302200 0x48302200 0x80>; /* EHRPWM */
615
616 ecap1: ecap@48302100 {
617 compatible = "ti,am33xx-ecap";
618 #pwm-cells = <3>;
619 reg = <0x48302100 0x80>;
e8c85a3e
MP		 620 interrupts = <47>;
621 interrupt-names = "ecap1";
0a7486c9
PA		 622 ti,hwmods = "ecap1";
623 status = "disabled";
624 };
625
626 ehrpwm1: ehrpwm@48302200 {
627 compatible = "ti,am33xx-ehrpwm";
628 #pwm-cells = <3>;
629 reg = <0x48302200 0x80>;
630 ti,hwmods = "ehrpwm1";
631 status = "disabled";
632 };
633 };
634
635 epwmss2: epwmss@48304000 {
636 compatible = "ti,am33xx-pwmss";
637 reg = <0x48304000 0x10>;
638 ti,hwmods = "epwmss2";
639 #address-cells = <1>;
640 #size-cells = <1>;
641 status = "disabled";
642 ranges = <0x48304100 0x48304100 0x80 /* ECAP */
643 0x48304180 0x48304180 0x80 /* EQEP */
644 0x48304200 0x48304200 0x80>; /* EHRPWM */
645
646 ecap2: ecap@48304100 {
647 compatible = "ti,am33xx-ecap";
648 #pwm-cells = <3>;
649 reg = <0x48304100 0x80>;
e8c85a3e
MP		 650 interrupts = <61>;
651 interrupt-names = "ecap2";
0a7486c9
PA		 652 ti,hwmods = "ecap2";
653 status = "disabled";
654 };
655
656 ehrpwm2: ehrpwm@48304200 {
657 compatible = "ti,am33xx-ehrpwm";
658 #pwm-cells = <3>;
659 reg = <0x48304200 0x80>;
660 ti,hwmods = "ehrpwm2";
661 status = "disabled";
662 };
663 };
664
1a39a65c
M		 665 mac: ethernet@4a100000 {
666 compatible = "ti,cpsw";
667 ti,hwmods = "cpgmac0";
668 cpdma_channels = <8>;
669 ale_entries = <1024>;
670 bd_ram_size = <0x2000>;
671 no_bd_ram = <0>;
672 rx_descs = <64>;
673 mac_control = <0x20>;
674 slaves = <2>;
e86ac13b 675 active_slave = <0>;
1a39a65c
M		 676 cpts_clock_mult = <0x80000000>;
677 cpts_clock_shift = <29>;
678 reg = <0x4a100000 0x800
679 0x4a101200 0x100>;
680 #address-cells = <1>;
681 #size-cells = <1>;
682 interrupt-parent = <&intc>;
683 /*
684 * c0_rx_thresh_pend
685 * c0_rx_pend
686 * c0_tx_pend
687 * c0_misc_pend
688 */
689 interrupts = <40 41 42 43>;
690 ranges;
691
692 davinci_mdio: mdio@4a101000 {
693 compatible = "ti,davinci_mdio";
694 #address-cells = <1>;
695 #size-cells = <0>;
696 ti,hwmods = "davinci_mdio";
697 bus_freq = <1000000>;
698 reg = <0x4a101000 0x100>;
699 };
700
701 cpsw_emac0: slave@4a100200 {
702 /* Filled in by U-Boot */
703 mac-address = [ 00 00 00 00 00 00 ];
704 };
705
706 cpsw_emac1: slave@4a100300 {
707 /* Filled in by U-Boot */
708 mac-address = [ 00 00 00 00 00 00 ];
709 };
39ffbd91
M		 710
711 phy_sel: cpsw-phy-sel@44e10650 {
712 compatible = "ti,am3352-cpsw-phy-sel";
713 reg= <0x44e10650 0x4>;
714 reg-names = "gmii-sel";
715 };
1a39a65c 716 };
f6575c90
VB		 717
718 ocmcram: ocmcram@40300000 {
719 compatible = "ti,am3352-ocmcram";
720 reg = <0x40300000 0x10000>;
721 ti,hwmods = "ocmcram";
f6575c90
VB		 722 };
723
724 wkup_m3: wkup_m3@44d00000 {
725 compatible = "ti,am3353-wkup-m3";
726 reg = <0x44d00000 0x4000 /* M3 UMEM */
727 0x44d80000 0x2000>; /* M3 DMEM */
728 ti,hwmods = "wkup_m3";
f12ecbe2 729 ti,no-reset-on-init;
f6575c90 730 };
e45879ec 731
15e8246b
PA		 732 elm: elm@48080000 {
733 compatible = "ti,am3352-elm";
734 reg = <0x48080000 0x2000>;
735 interrupts = <4>;
736 ti,hwmods = "elm";
d6cfc1e2
BP		 737 status = "disabled";
738 };
739
740 lcdc: lcdc@4830e000 {
741 compatible = "ti,am33xx-tilcdc";
742 reg = <0x4830e000 0x1000>;
743 interrupt-parent = <&intc>;
744 interrupts = <36>;
745 ti,hwmods = "lcdc";
15e8246b
PA		 746 status = "disabled";
747 };
748
a82279dd
PR		 749 tscadc: tscadc@44e0d000 {
750 compatible = "ti,am3359-tscadc";
751 reg = <0x44e0d000 0x1000>;
752 interrupt-parent = <&intc>;
753 interrupts = <16>;
754 ti,hwmods = "adc_tsc";
755 status = "disabled";
756
757 tsc {
758 compatible = "ti,am3359-tsc";
759 };
760 am335x_adc: adc {
761 #io-channel-cells = <1>;
762 compatible = "ti,am3359-adc";
763 };
a82279dd
PR		 764 };
765
e45879ec
PA		 766 gpmc: gpmc@50000000 {
767 compatible = "ti,am3352-gpmc";
768 ti,hwmods = "gpmc";
f12ecbe2 769 ti,no-idle-on-init;
e45879ec
PA		 770 reg = <0x50000000 0x2000>;
771 interrupts = <100>;
00dddcaa
LP		 772 gpmc,num-cs = <7>;
773 gpmc,num-waitpins = <2>;
e45879ec
PA		 774 #address-cells = <2>;
775 #size-cells = <1>;
776 status = "disabled";
777 };
f8302e1e
MG		 778
779 sham: sham@53100000 {
780 compatible = "ti,omap4-sham";
781 ti,hwmods = "sham";
782 reg = <0x53100000 0x200>;
783 interrupts = <109>;
784 dmas = <&edma 36>;
785 dma-names = "rx";
786 };
99919e5e
MG		 787
788 aes: aes@53500000 {
789 compatible = "ti,omap4-aes";
790 ti,hwmods = "aes";
791 reg = <0x53500000 0xa0>;
7af8884a 792 interrupts = <103>;
99919e5e
MG		 793 dmas = <&edma 6>,
794 <&edma 5>;
795 dma-names = "tx", "rx";
796 };
3f72f875
PA		 797
798 mcasp0: mcasp@48038000 {
799 compatible = "ti,am33xx-mcasp-audio";
800 ti,hwmods = "mcasp0";
0bee55ab
JS		 801 reg = <0x48038000 0x2000>,
802 <0x46000000 0x400000>;
803 reg-names = "mpu", "dat";
3f72f875
PA		 804 interrupts = <80>, <81>;
805 interrupts-names = "tx", "rx";
806 status = "disabled";
807 dmas = <&edma 8>,
808 <&edma 9>;
809 dma-names = "tx", "rx";
810 };
811
812 mcasp1: mcasp@4803C000 {
813 compatible = "ti,am33xx-mcasp-audio";
814 ti,hwmods = "mcasp1";
0bee55ab
JS		 815 reg = <0x4803C000 0x2000>,
816 <0x46400000 0x400000>;
817 reg-names = "mpu", "dat";
3f72f875
PA		 818 interrupts = <82>, <83>;
819 interrupts-names = "tx", "rx";
820 status = "disabled";
821 dmas = <&edma 10>,
822 <&edma 11>;
823 dma-names = "tx", "rx";
824 };
ed845d6b
LV		 825
826 rng: rng@48310000 {
827 compatible = "ti,omap4-rng";
828 ti,hwmods = "rng";
829 reg = <0x48310000 0x2000>;
830 interrupts = <111>;
831 };
5fc0b42a
AC		 832 };
833};
ea291c98
TK		 834
835/include/ "am33xx-clocks.dtsi"
Linux 6.x block layer and io_uring tree(s)