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ARM: dts: omap4/5: Use l3_ick for the gpmc node
[linux-2.6-block.git] / arch / arm / boot / dts / am33xx.dtsi
CommitLineData
5fc0b42a
AC		 1/*
2 * Device Tree Source for AM33XX SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
e94233c2 11#include <dt-bindings/gpio/gpio.h>
6a8a6b65 12#include <dt-bindings/pinctrl/am33xx.h>
e94233c2 13
eb33ef66 14#include "skeleton.dtsi"
5fc0b42a
AC		 15
16/ {
17 compatible = "ti,am33xx";
4c94ac29 18 interrupt-parent = <&intc>;
5fc0b42a
AC		 19
20 aliases {
6a968678
NM		 21 i2c0 = &i2c0;
22 i2c1 = &i2c1;
23 i2c2 = &i2c2;
dde3b0d6
VH		 24 serial0 = &uart0;
25 serial1 = &uart1;
26 serial2 = &uart2;
27 serial3 = &uart3;
28 serial4 = &uart4;
29 serial5 = &uart5;
7a57ee87
AC		 30 d_can0 = &dcan0;
31 d_can1 = &dcan1;
97238b35
SAS		 32 usb0 = &usb0;
33 usb1 = &usb1;
34 phy0 = &usb0_phy;
35 phy1 = &usb1_phy;
8170056d
DM		 36 ethernet0 = &cpsw_emac0;
37 ethernet1 = &cpsw_emac1;
5fc0b42a
AC		 38 };
39
40 cpus {
2e0d513f
LP		 41 #address-cells = <1>;
42 #size-cells = <0>;
5fc0b42a
AC		 43 cpu@0 {
44 compatible = "arm,cortex-a8";
2e0d513f
LP		 45 device_type = "cpu";
46 reg = <0>;
efeedcf2
AC		 47
48 /*
49 * To consider voltage drop between PMIC and SoC,
50 * tolerance value is reduced to 2% from 4% and
51 * voltage value is increased as a precaution.
52 */
53 operating-points = <
54 /* kHz uV */
55 720000 1285000
56 600000 1225000
57 500000 1125000
58 275000 1125000
59 >;
60 voltage-tolerance = <2>; /* 2 percentage */
61 clock-latency = <300000>; /* From omap-cpufreq driver */
5fc0b42a
AC		 62 };
63 };
64
6797cdbe
AB		 65 pmu {
66 compatible = "arm,cortex-a8-pmu";
67 interrupts = <3>;
68 };
69
5fc0b42a
AC		 70 /*
71 * The soc node represents the soc top level view. It is uses for IPs
72 * that are not memory mapped in the MPU view or for the MPU itself.
73 */
74 soc {
75 compatible = "ti,omap-infra";
76 mpu {
77 compatible = "ti,omap3-mpu";
78 ti,hwmods = "mpu";
79 };
80 };
81
b552dfc4
AC		 82 am33xx_pinmux: pinmux@44e10800 {
83 compatible = "pinctrl-single";
84 reg = <0x44e10800 0x0238>;
85 #address-cells = <1>;
86 #size-cells = <0>;
87 pinctrl-single,register-width = <32>;
88 pinctrl-single,function-mask = <0x7f>;
89 };
90
5fc0b42a
AC		 91 /*
92 * XXX: Use a flat representation of the AM33XX interconnect.
93 * The real AM33XX interconnect network is quite complex.Since
94 * that will not bring real advantage to represent that in DT
95 * for the moment, just use a fake OCP bus entry to represent
96 * the whole bus hierarchy.
97 */
98 ocp {
99 compatible = "simple-bus";
100 #address-cells = <1>;
101 #size-cells = <1>;
102 ranges;
103 ti,hwmods = "l3_main";
104
ea291c98
TK		 105 prcm: prcm@44e00000 {
106 compatible = "ti,am3-prcm";
107 reg = <0x44e00000 0x4000>;
108
109 prcm_clocks: clocks {
110 #address-cells = <1>;
111 #size-cells = <0>;
112 };
113
114 prcm_clockdomains: clockdomains {
115 };
116 };
117
118 scrm: scrm@44e10000 {
119 compatible = "ti,am3-scrm";
120 reg = <0x44e10000 0x2000>;
121
122 scrm_clocks: clocks {
123 #address-cells = <1>;
124 #size-cells = <0>;
125 };
126
127 scrm_clockdomains: clockdomains {
128 };
129 };
130
5fc0b42a
AC		 131 intc: interrupt-controller@48200000 {
132 compatible = "ti,omap2-intc";
133 interrupt-controller;
134 #interrupt-cells = <1>;
135 ti,intc-size = <128>;
136 reg = <0x48200000 0x1000>;
137 };
138
505975d3
MP		 139 edma: edma@49000000 {
140 compatible = "ti,edma3";
141 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
142 reg = <0x49000000 0x10000>,
143 <0x44e10f90 0x10>;
144 interrupts = <12 13 14>;
145 #dma-cells = <1>;
146 dma-channels = <64>;
147 ti,edma-regions = <4>;
148 ti,edma-slots = <256>;
149 };
150
b918e2c0 151 gpio0: gpio@44e07000 {
5fc0b42a
AC		 152 compatible = "ti,omap4-gpio";
153 ti,hwmods = "gpio1";
154 gpio-controller;
155 #gpio-cells = <2>;
156 interrupt-controller;
5eac0eb7 157 #interrupt-cells = <2>;
4462b31c 158 reg = <0x44e07000 0x1000>;
4462b31c 159 interrupts = <96>;
5fc0b42a
AC		 160 };
161
b918e2c0 162 gpio1: gpio@4804c000 {
5fc0b42a
AC		 163 compatible = "ti,omap4-gpio";
164 ti,hwmods = "gpio2";
165 gpio-controller;
166 #gpio-cells = <2>;
167 interrupt-controller;
5eac0eb7 168 #interrupt-cells = <2>;
4462b31c 169 reg = <0x4804c000 0x1000>;
4462b31c 170 interrupts = <98>;
5fc0b42a
AC		 171 };
172
b918e2c0 173 gpio2: gpio@481ac000 {
5fc0b42a
AC		 174 compatible = "ti,omap4-gpio";
175 ti,hwmods = "gpio3";
176 gpio-controller;
177 #gpio-cells = <2>;
178 interrupt-controller;
5eac0eb7 179 #interrupt-cells = <2>;
4462b31c 180 reg = <0x481ac000 0x1000>;
4462b31c 181 interrupts = <32>;
5fc0b42a
AC		 182 };
183
b918e2c0 184 gpio3: gpio@481ae000 {
5fc0b42a
AC		 185 compatible = "ti,omap4-gpio";
186 ti,hwmods = "gpio4";
187 gpio-controller;
188 #gpio-cells = <2>;
189 interrupt-controller;
5eac0eb7 190 #interrupt-cells = <2>;
4462b31c 191 reg = <0x481ae000 0x1000>;
4462b31c 192 interrupts = <62>;
5fc0b42a
AC		 193 };
194
dde3b0d6 195 uart0: serial@44e09000 {
5fc0b42a
AC		 196 compatible = "ti,omap3-uart";
197 ti,hwmods = "uart1";
198 clock-frequency = <48000000>;
4462b31c 199 reg = <0x44e09000 0x2000>;
4462b31c 200 interrupts = <72>;
53d91034 201 status = "disabled";
5fc0b42a
AC		 202 };
203
dde3b0d6 204 uart1: serial@48022000 {
5fc0b42a
AC		 205 compatible = "ti,omap3-uart";
206 ti,hwmods = "uart2";
207 clock-frequency = <48000000>;
4462b31c 208 reg = <0x48022000 0x2000>;
4462b31c 209 interrupts = <73>;
53d91034 210 status = "disabled";
5fc0b42a
AC		 211 };
212
dde3b0d6 213 uart2: serial@48024000 {
5fc0b42a
AC		 214 compatible = "ti,omap3-uart";
215 ti,hwmods = "uart3";
216 clock-frequency = <48000000>;
4462b31c 217 reg = <0x48024000 0x2000>;
4462b31c 218 interrupts = <74>;
53d91034 219 status = "disabled";
5fc0b42a
AC		 220 };
221
dde3b0d6 222 uart3: serial@481a6000 {
5fc0b42a
AC		 223 compatible = "ti,omap3-uart";
224 ti,hwmods = "uart4";
225 clock-frequency = <48000000>;
4462b31c 226 reg = <0x481a6000 0x2000>;
4462b31c 227 interrupts = <44>;
53d91034 228 status = "disabled";
5fc0b42a
AC		 229 };
230
dde3b0d6 231 uart4: serial@481a8000 {
5fc0b42a
AC		 232 compatible = "ti,omap3-uart";
233 ti,hwmods = "uart5";
234 clock-frequency = <48000000>;
4462b31c 235 reg = <0x481a8000 0x2000>;
4462b31c 236 interrupts = <45>;
53d91034 237 status = "disabled";
5fc0b42a
AC		 238 };
239
dde3b0d6 240 uart5: serial@481aa000 {
5fc0b42a
AC		 241 compatible = "ti,omap3-uart";
242 ti,hwmods = "uart6";
243 clock-frequency = <48000000>;
4462b31c 244 reg = <0x481aa000 0x2000>;
4462b31c 245 interrupts = <46>;
53d91034 246 status = "disabled";
5fc0b42a
AC		 247 };
248
b918e2c0 249 i2c0: i2c@44e0b000 {
5fc0b42a
AC		 250 compatible = "ti,omap4-i2c";
251 #address-cells = <1>;
252 #size-cells = <0>;
253 ti,hwmods = "i2c1";
4462b31c 254 reg = <0x44e0b000 0x1000>;
4462b31c 255 interrupts = <70>;
53d91034 256 status = "disabled";
5fc0b42a
AC		 257 };
258
b918e2c0 259 i2c1: i2c@4802a000 {
5fc0b42a
AC		 260 compatible = "ti,omap4-i2c";
261 #address-cells = <1>;
262 #size-cells = <0>;
263 ti,hwmods = "i2c2";
4462b31c 264 reg = <0x4802a000 0x1000>;
4462b31c 265 interrupts = <71>;
53d91034 266 status = "disabled";
5fc0b42a
AC		 267 };
268
b918e2c0 269 i2c2: i2c@4819c000 {
5fc0b42a
AC		 270 compatible = "ti,omap4-i2c";
271 #address-cells = <1>;
272 #size-cells = <0>;
273 ti,hwmods = "i2c3";
4462b31c 274 reg = <0x4819c000 0x1000>;
4462b31c 275 interrupts = <30>;
53d91034 276 status = "disabled";
5fc0b42a 277 };
5f789ebc 278
55b4452b
MP		 279 mmc1: mmc@48060000 {
280 compatible = "ti,omap4-hsmmc";
281 ti,hwmods = "mmc1";
282 ti,dual-volt;
283 ti,needs-special-reset;
284 ti,needs-special-hs-handling;
285 dmas = <&edma 24
286 &edma 25>;
287 dma-names = "tx", "rx";
288 interrupts = <64>;
289 interrupt-parent = <&intc>;
290 reg = <0x48060000 0x1000>;
291 status = "disabled";
292 };
293
294 mmc2: mmc@481d8000 {
295 compatible = "ti,omap4-hsmmc";
296 ti,hwmods = "mmc2";
297 ti,needs-special-reset;
298 dmas = <&edma 2
299 &edma 3>;
300 dma-names = "tx", "rx";
301 interrupts = <28>;
302 interrupt-parent = <&intc>;
303 reg = <0x481d8000 0x1000>;
304 status = "disabled";
305 };
306
307 mmc3: mmc@47810000 {
308 compatible = "ti,omap4-hsmmc";
309 ti,hwmods = "mmc3";
310 ti,needs-special-reset;
311 interrupts = <29>;
312 interrupt-parent = <&intc>;
313 reg = <0x47810000 0x1000>;
314 status = "disabled";
315 };
316
d4cbe80d
SA		 317 hwspinlock: spinlock@480ca000 {
318 compatible = "ti,omap4-hwspinlock";
319 reg = <0x480ca000 0x1000>;
320 ti,hwmods = "spinlock";
321 };
322
5f789ebc
AM		 323 wdt2: wdt@44e35000 {
324 compatible = "ti,omap3-wdt";
325 ti,hwmods = "wd_timer2";
4462b31c 326 reg = <0x44e35000 0x1000>;
4462b31c 327 interrupts = <91>;
5f789ebc 328 };
059b185d
AC		 329
330 dcan0: d_can@481cc000 {
331 compatible = "bosch,d_can";
332 ti,hwmods = "d_can0";
f178c015
AC		 333 reg = <0x481cc000 0x2000
334 0x44e10644 0x4>;
059b185d 335 interrupts = <52>;
059b185d
AC		 336 status = "disabled";
337 };
338
339 dcan1: d_can@481d0000 {
340 compatible = "bosch,d_can";
341 ti,hwmods = "d_can1";
f178c015
AC		 342 reg = <0x481d0000 0x2000
343 0x44e10644 0x4>;
059b185d 344 interrupts = <55>;
059b185d
AC		 345 status = "disabled";
346 };
fab8ad0b
JH		 347
348 timer1: timer@44e31000 {
002e1ec5 349 compatible = "ti,am335x-timer-1ms";
fab8ad0b
JH		 350 reg = <0x44e31000 0x400>;
351 interrupts = <67>;
352 ti,hwmods = "timer1";
353 ti,timer-alwon;
354 };
355
356 timer2: timer@48040000 {
002e1ec5 357 compatible = "ti,am335x-timer";
fab8ad0b
JH		 358 reg = <0x48040000 0x400>;
359 interrupts = <68>;
360 ti,hwmods = "timer2";
361 };
362
363 timer3: timer@48042000 {
002e1ec5 364 compatible = "ti,am335x-timer";
fab8ad0b
JH		 365 reg = <0x48042000 0x400>;
366 interrupts = <69>;
367 ti,hwmods = "timer3";
368 };
369
370 timer4: timer@48044000 {
002e1ec5 371 compatible = "ti,am335x-timer";
fab8ad0b
JH		 372 reg = <0x48044000 0x400>;
373 interrupts = <92>;
374 ti,hwmods = "timer4";
375 ti,timer-pwm;
376 };
377
378 timer5: timer@48046000 {
002e1ec5 379 compatible = "ti,am335x-timer";
fab8ad0b
JH		 380 reg = <0x48046000 0x400>;
381 interrupts = <93>;
382 ti,hwmods = "timer5";
383 ti,timer-pwm;
384 };
385
386 timer6: timer@48048000 {
002e1ec5 387 compatible = "ti,am335x-timer";
fab8ad0b
JH		 388 reg = <0x48048000 0x400>;
389 interrupts = <94>;
390 ti,hwmods = "timer6";
391 ti,timer-pwm;
392 };
393
394 timer7: timer@4804a000 {
002e1ec5 395 compatible = "ti,am335x-timer";
fab8ad0b
JH		 396 reg = <0x4804a000 0x400>;
397 interrupts = <95>;
398 ti,hwmods = "timer7";
399 ti,timer-pwm;
400 };
0d935c16
AM		 401
402 rtc@44e3e000 {
403 compatible = "ti,da830-rtc";
404 reg = <0x44e3e000 0x1000>;
405 interrupts = <75
406 76>;
407 ti,hwmods = "rtc";
408 };
9fd3c748
PA		 409
410 spi0: spi@48030000 {
411 compatible = "ti,omap4-mcspi";
412 #address-cells = <1>;
413 #size-cells = <0>;
414 reg = <0x48030000 0x400>;
7b3754c6 415 interrupts = <65>;
9fd3c748
PA		 416 ti,spi-num-cs = <2>;
417 ti,hwmods = "spi0";
f5e2f807
MP		 418 dmas = <&edma 16
419 &edma 17
420 &edma 18
421 &edma 19>;
422 dma-names = "tx0", "rx0", "tx1", "rx1";
9fd3c748
PA		 423 status = "disabled";
424 };
425
426 spi1: spi@481a0000 {
427 compatible = "ti,omap4-mcspi";
428 #address-cells = <1>;
429 #size-cells = <0>;
430 reg = <0x481a0000 0x400>;
7b3754c6 431 interrupts = <125>;
9fd3c748
PA		 432 ti,spi-num-cs = <2>;
433 ti,hwmods = "spi1";
f5e2f807
MP		 434 dmas = <&edma 42
435 &edma 43
436 &edma 44
437 &edma 45>;
438 dma-names = "tx0", "rx0", "tx1", "rx1";
9fd3c748
PA		 439 status = "disabled";
440 };
35b47fbb 441
97238b35
SAS		 442 usb: usb@47400000 {
443 compatible = "ti,am33xx-usb";
444 reg = <0x47400000 0x1000>;
445 ranges;
446 #address-cells = <1>;
447 #size-cells = <1>;
35b47fbb 448 ti,hwmods = "usb_otg_hs";
97238b35
SAS		 449 status = "disabled";
450
e7243b76 451 usb_ctrl_mod: control@44e10000 {
97238b35
SAS		 452 compatible = "ti,am335x-usb-ctrl-module";
453 reg = <0x44e10620 0x10
454 0x44e10648 0x4>;
455 reg-names = "phy_ctrl", "wakeup";
456 status = "disabled";
457 };
458
c031a7d4 459 usb0_phy: usb-phy@47401300 {
97238b35
SAS		 460 compatible = "ti,am335x-usb-phy";
461 reg = <0x47401300 0x100>;
462 reg-names = "phy";
463 status = "disabled";
e7243b76 464 ti,ctrl_mod = <&usb_ctrl_mod>;
97238b35
SAS		 465 };
466
467 usb0: usb@47401000 {
468 compatible = "ti,musb-am33xx";
97238b35 469 status = "disabled";
c031a7d4
SAS		 470 reg = <0x47401400 0x400
471 0x47401000 0x200>;
472 reg-names = "mc", "control";
473
474 interrupts = <18>;
475 interrupt-names = "mc";
476 dr_mode = "otg";
477 mentor,multipoint = <1>;
478 mentor,num-eps = <16>;
479 mentor,ram-bits = <12>;
480 mentor,power = <500>;
481 phys = <&usb0_phy>;
9b3452d1
SAS		 482
483 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
484 &cppi41dma 2 0 &cppi41dma 3 0
485 &cppi41dma 4 0 &cppi41dma 5 0
486 &cppi41dma 6 0 &cppi41dma 7 0
487 &cppi41dma 8 0 &cppi41dma 9 0
488 &cppi41dma 10 0 &cppi41dma 11 0
489 &cppi41dma 12 0 &cppi41dma 13 0
490 &cppi41dma 14 0 &cppi41dma 0 1
491 &cppi41dma 1 1 &cppi41dma 2 1
492 &cppi41dma 3 1 &cppi41dma 4 1
493 &cppi41dma 5 1 &cppi41dma 6 1
494 &cppi41dma 7 1 &cppi41dma 8 1
495 &cppi41dma 9 1 &cppi41dma 10 1
496 &cppi41dma 11 1 &cppi41dma 12 1
497 &cppi41dma 13 1 &cppi41dma 14 1>;
498 dma-names =
499 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
500 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
501 "rx14", "rx15",
502 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
503 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
504 "tx14", "tx15";
97238b35
SAS		 505 };
506
c031a7d4 507 usb1_phy: usb-phy@47401b00 {
97238b35
SAS		 508 compatible = "ti,am335x-usb-phy";
509 reg = <0x47401b00 0x100>;
510 reg-names = "phy";
511 status = "disabled";
e7243b76 512 ti,ctrl_mod = <&usb_ctrl_mod>;
97238b35
SAS		 513 };
514
515 usb1: usb@47401800 {
516 compatible = "ti,musb-am33xx";
97238b35 517 status = "disabled";
c031a7d4
SAS		 518 reg = <0x47401c00 0x400
519 0x47401800 0x200>;
520 reg-names = "mc", "control";
521 interrupts = <19>;
522 interrupt-names = "mc";
523 dr_mode = "otg";
524 mentor,multipoint = <1>;
525 mentor,num-eps = <16>;
526 mentor,ram-bits = <12>;
527 mentor,power = <500>;
528 phys = <&usb1_phy>;
9b3452d1
SAS		 529
530 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
531 &cppi41dma 17 0 &cppi41dma 18 0
532 &cppi41dma 19 0 &cppi41dma 20 0
533 &cppi41dma 21 0 &cppi41dma 22 0
534 &cppi41dma 23 0 &cppi41dma 24 0
535 &cppi41dma 25 0 &cppi41dma 26 0
536 &cppi41dma 27 0 &cppi41dma 28 0
537 &cppi41dma 29 0 &cppi41dma 15 1
538 &cppi41dma 16 1 &cppi41dma 17 1
539 &cppi41dma 18 1 &cppi41dma 19 1
540 &cppi41dma 20 1 &cppi41dma 21 1
541 &cppi41dma 22 1 &cppi41dma 23 1
542 &cppi41dma 24 1 &cppi41dma 25 1
543 &cppi41dma 26 1 &cppi41dma 27 1
544 &cppi41dma 28 1 &cppi41dma 29 1>;
545 dma-names =
546 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
547 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
548 "rx14", "rx15",
549 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
550 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
551 "tx14", "tx15";
97238b35 552 };
9b3452d1 553
c031a7d4 554 cppi41dma: dma-controller@07402000 {
9b3452d1
SAS		 555 compatible = "ti,am3359-cppi41";
556 reg = <0x47400000 0x1000
557 0x47402000 0x1000
558 0x47403000 0x1000
559 0x47404000 0x4000>;
3b6394b4 560 reg-names = "glue", "controller", "scheduler", "queuemgr";
9b3452d1
SAS		 561 interrupts = <17>;
562 interrupt-names = "glue";
563 #dma-cells = <2>;
564 #dma-channels = <30>;
565 #dma-requests = <256>;
566 status = "disabled";
567 };
35b47fbb 568 };
6be35c70 569
0a7486c9
PA		 570 epwmss0: epwmss@48300000 {
571 compatible = "ti,am33xx-pwmss";
572 reg = <0x48300000 0x10>;
573 ti,hwmods = "epwmss0";
574 #address-cells = <1>;
575 #size-cells = <1>;
576 status = "disabled";
577 ranges = <0x48300100 0x48300100 0x80 /* ECAP */
578 0x48300180 0x48300180 0x80 /* EQEP */
579 0x48300200 0x48300200 0x80>; /* EHRPWM */
580
581 ecap0: ecap@48300100 {
582 compatible = "ti,am33xx-ecap";
583 #pwm-cells = <3>;
584 reg = <0x48300100 0x80>;
585 ti,hwmods = "ecap0";
586 status = "disabled";
587 };
588
589 ehrpwm0: ehrpwm@48300200 {
590 compatible = "ti,am33xx-ehrpwm";
591 #pwm-cells = <3>;
592 reg = <0x48300200 0x80>;
593 ti,hwmods = "ehrpwm0";
594 status = "disabled";
595 };
596 };
597
598 epwmss1: epwmss@48302000 {
599 compatible = "ti,am33xx-pwmss";
600 reg = <0x48302000 0x10>;
601 ti,hwmods = "epwmss1";
602 #address-cells = <1>;
603 #size-cells = <1>;
604 status = "disabled";
605 ranges = <0x48302100 0x48302100 0x80 /* ECAP */
606 0x48302180 0x48302180 0x80 /* EQEP */
607 0x48302200 0x48302200 0x80>; /* EHRPWM */
608
609 ecap1: ecap@48302100 {
610 compatible = "ti,am33xx-ecap";
611 #pwm-cells = <3>;
612 reg = <0x48302100 0x80>;
613 ti,hwmods = "ecap1";
614 status = "disabled";
615 };
616
617 ehrpwm1: ehrpwm@48302200 {
618 compatible = "ti,am33xx-ehrpwm";
619 #pwm-cells = <3>;
620 reg = <0x48302200 0x80>;
621 ti,hwmods = "ehrpwm1";
622 status = "disabled";
623 };
624 };
625
626 epwmss2: epwmss@48304000 {
627 compatible = "ti,am33xx-pwmss";
628 reg = <0x48304000 0x10>;
629 ti,hwmods = "epwmss2";
630 #address-cells = <1>;
631 #size-cells = <1>;
632 status = "disabled";
633 ranges = <0x48304100 0x48304100 0x80 /* ECAP */
634 0x48304180 0x48304180 0x80 /* EQEP */
635 0x48304200 0x48304200 0x80>; /* EHRPWM */
636
637 ecap2: ecap@48304100 {
638 compatible = "ti,am33xx-ecap";
639 #pwm-cells = <3>;
640 reg = <0x48304100 0x80>;
641 ti,hwmods = "ecap2";
642 status = "disabled";
643 };
644
645 ehrpwm2: ehrpwm@48304200 {
646 compatible = "ti,am33xx-ehrpwm";
647 #pwm-cells = <3>;
648 reg = <0x48304200 0x80>;
649 ti,hwmods = "ehrpwm2";
650 status = "disabled";
651 };
652 };
653
1a39a65c
M		 654 mac: ethernet@4a100000 {
655 compatible = "ti,cpsw";
656 ti,hwmods = "cpgmac0";
657 cpdma_channels = <8>;
658 ale_entries = <1024>;
659 bd_ram_size = <0x2000>;
660 no_bd_ram = <0>;
661 rx_descs = <64>;
662 mac_control = <0x20>;
663 slaves = <2>;
e86ac13b 664 active_slave = <0>;
1a39a65c
M		 665 cpts_clock_mult = <0x80000000>;
666 cpts_clock_shift = <29>;
667 reg = <0x4a100000 0x800
668 0x4a101200 0x100>;
669 #address-cells = <1>;
670 #size-cells = <1>;
671 interrupt-parent = <&intc>;
672 /*
673 * c0_rx_thresh_pend
674 * c0_rx_pend
675 * c0_tx_pend
676 * c0_misc_pend
677 */
678 interrupts = <40 41 42 43>;
679 ranges;
680
681 davinci_mdio: mdio@4a101000 {
682 compatible = "ti,davinci_mdio";
683 #address-cells = <1>;
684 #size-cells = <0>;
685 ti,hwmods = "davinci_mdio";
686 bus_freq = <1000000>;
687 reg = <0x4a101000 0x100>;
688 };
689
690 cpsw_emac0: slave@4a100200 {
691 /* Filled in by U-Boot */
692 mac-address = [ 00 00 00 00 00 00 ];
693 };
694
695 cpsw_emac1: slave@4a100300 {
696 /* Filled in by U-Boot */
697 mac-address = [ 00 00 00 00 00 00 ];
698 };
39ffbd91
M		 699
700 phy_sel: cpsw-phy-sel@44e10650 {
701 compatible = "ti,am3352-cpsw-phy-sel";
702 reg= <0x44e10650 0x4>;
703 reg-names = "gmii-sel";
704 };
1a39a65c 705 };
f6575c90
VB		 706
707 ocmcram: ocmcram@40300000 {
708 compatible = "ti,am3352-ocmcram";
709 reg = <0x40300000 0x10000>;
710 ti,hwmods = "ocmcram";
f6575c90
VB		 711 };
712
713 wkup_m3: wkup_m3@44d00000 {
714 compatible = "ti,am3353-wkup-m3";
715 reg = <0x44d00000 0x4000 /* M3 UMEM */
716 0x44d80000 0x2000>; /* M3 DMEM */
717 ti,hwmods = "wkup_m3";
f12ecbe2 718 ti,no-reset-on-init;
f6575c90 719 };
e45879ec 720
15e8246b
PA		 721 elm: elm@48080000 {
722 compatible = "ti,am3352-elm";
723 reg = <0x48080000 0x2000>;
724 interrupts = <4>;
725 ti,hwmods = "elm";
d6cfc1e2
BP		 726 status = "disabled";
727 };
728
729 lcdc: lcdc@4830e000 {
730 compatible = "ti,am33xx-tilcdc";
731 reg = <0x4830e000 0x1000>;
732 interrupt-parent = <&intc>;
733 interrupts = <36>;
734 ti,hwmods = "lcdc";
15e8246b
PA		 735 status = "disabled";
736 };
737
a82279dd
PR		 738 tscadc: tscadc@44e0d000 {
739 compatible = "ti,am3359-tscadc";
740 reg = <0x44e0d000 0x1000>;
741 interrupt-parent = <&intc>;
742 interrupts = <16>;
743 ti,hwmods = "adc_tsc";
744 status = "disabled";
745
746 tsc {
747 compatible = "ti,am3359-tsc";
748 };
749 am335x_adc: adc {
750 #io-channel-cells = <1>;
751 compatible = "ti,am3359-adc";
752 };
a82279dd
PR		 753 };
754
e45879ec
PA		 755 gpmc: gpmc@50000000 {
756 compatible = "ti,am3352-gpmc";
757 ti,hwmods = "gpmc";
f12ecbe2 758 ti,no-idle-on-init;
e45879ec
PA		 759 reg = <0x50000000 0x2000>;
760 interrupts = <100>;
00dddcaa
LP		 761 gpmc,num-cs = <7>;
762 gpmc,num-waitpins = <2>;
e45879ec
PA		 763 #address-cells = <2>;
764 #size-cells = <1>;
765 status = "disabled";
766 };
f8302e1e
MG		 767
768 sham: sham@53100000 {
769 compatible = "ti,omap4-sham";
770 ti,hwmods = "sham";
771 reg = <0x53100000 0x200>;
772 interrupts = <109>;
773 dmas = <&edma 36>;
774 dma-names = "rx";
775 };
99919e5e
MG		 776
777 aes: aes@53500000 {
778 compatible = "ti,omap4-aes";
779 ti,hwmods = "aes";
780 reg = <0x53500000 0xa0>;
7af8884a 781 interrupts = <103>;
99919e5e
MG		 782 dmas = <&edma 6>,
783 <&edma 5>;
784 dma-names = "tx", "rx";
785 };
3f72f875
PA		 786
787 mcasp0: mcasp@48038000 {
788 compatible = "ti,am33xx-mcasp-audio";
789 ti,hwmods = "mcasp0";
0bee55ab
JS		 790 reg = <0x48038000 0x2000>,
791 <0x46000000 0x400000>;
792 reg-names = "mpu", "dat";
3f72f875
PA		 793 interrupts = <80>, <81>;
794 interrupts-names = "tx", "rx";
795 status = "disabled";
796 dmas = <&edma 8>,
797 <&edma 9>;
798 dma-names = "tx", "rx";
799 };
800
801 mcasp1: mcasp@4803C000 {
802 compatible = "ti,am33xx-mcasp-audio";
803 ti,hwmods = "mcasp1";
0bee55ab
JS		 804 reg = <0x4803C000 0x2000>,
805 <0x46400000 0x400000>;
806 reg-names = "mpu", "dat";
3f72f875
PA		 807 interrupts = <82>, <83>;
808 interrupts-names = "tx", "rx";
809 status = "disabled";
810 dmas = <&edma 10>,
811 <&edma 11>;
812 dma-names = "tx", "rx";
813 };
ed845d6b
LV		 814
815 rng: rng@48310000 {
816 compatible = "ti,omap4-rng";
817 ti,hwmods = "rng";
818 reg = <0x48310000 0x2000>;
819 interrupts = <111>;
820 };
5fc0b42a
AC		 821 };
822};
ea291c98
TK		 823
824/include/ "am33xx-clocks.dtsi"
Linux 6.x block layer and io_uring tree(s)