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ARM: dts: AM33XX: Add EDMA support
[linux-2.6-block.git] / arch / arm / boot / dts / am33xx.dtsi
CommitLineData
5fc0b42a
AC		 1/*
2 * Device Tree Source for AM33XX SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
e94233c2 11#include <dt-bindings/gpio/gpio.h>
6a8a6b65 12#include <dt-bindings/pinctrl/am33xx.h>
e94233c2 13
eb33ef66 14#include "skeleton.dtsi"
5fc0b42a
AC		 15
16/ {
17 compatible = "ti,am33xx";
4c94ac29 18 interrupt-parent = <&intc>;
5fc0b42a
AC		 19
20 aliases {
dde3b0d6
VH		 21 serial0 = &uart0;
22 serial1 = &uart1;
23 serial2 = &uart2;
24 serial3 = &uart3;
25 serial4 = &uart4;
26 serial5 = &uart5;
7a57ee87
AC		 27 d_can0 = &dcan0;
28 d_can1 = &dcan1;
97238b35
SAS		 29 usb0 = &usb0;
30 usb1 = &usb1;
31 phy0 = &usb0_phy;
32 phy1 = &usb1_phy;
5fc0b42a
AC		 33 };
34
35 cpus {
2e0d513f
LP		 36 #address-cells = <1>;
37 #size-cells = <0>;
5fc0b42a
AC		 38 cpu@0 {
39 compatible = "arm,cortex-a8";
2e0d513f
LP		 40 device_type = "cpu";
41 reg = <0>;
efeedcf2
AC		 42
43 /*
44 * To consider voltage drop between PMIC and SoC,
45 * tolerance value is reduced to 2% from 4% and
46 * voltage value is increased as a precaution.
47 */
48 operating-points = <
49 /* kHz uV */
50 720000 1285000
51 600000 1225000
52 500000 1125000
53 275000 1125000
54 >;
55 voltage-tolerance = <2>; /* 2 percentage */
56 clock-latency = <300000>; /* From omap-cpufreq driver */
5fc0b42a
AC		 57 };
58 };
59
6797cdbe
AB		 60 pmu {
61 compatible = "arm,cortex-a8-pmu";
62 interrupts = <3>;
63 };
64
5fc0b42a
AC		 65 /*
66 * The soc node represents the soc top level view. It is uses for IPs
67 * that are not memory mapped in the MPU view or for the MPU itself.
68 */
69 soc {
70 compatible = "ti,omap-infra";
71 mpu {
72 compatible = "ti,omap3-mpu";
73 ti,hwmods = "mpu";
74 };
75 };
76
b552dfc4
AC		 77 am33xx_pinmux: pinmux@44e10800 {
78 compatible = "pinctrl-single";
79 reg = <0x44e10800 0x0238>;
80 #address-cells = <1>;
81 #size-cells = <0>;
82 pinctrl-single,register-width = <32>;
83 pinctrl-single,function-mask = <0x7f>;
84 };
85
5fc0b42a
AC		 86 /*
87 * XXX: Use a flat representation of the AM33XX interconnect.
88 * The real AM33XX interconnect network is quite complex.Since
89 * that will not bring real advantage to represent that in DT
90 * for the moment, just use a fake OCP bus entry to represent
91 * the whole bus hierarchy.
92 */
93 ocp {
94 compatible = "simple-bus";
95 #address-cells = <1>;
96 #size-cells = <1>;
97 ranges;
98 ti,hwmods = "l3_main";
99
100 intc: interrupt-controller@48200000 {
101 compatible = "ti,omap2-intc";
102 interrupt-controller;
103 #interrupt-cells = <1>;
104 ti,intc-size = <128>;
105 reg = <0x48200000 0x1000>;
106 };
107
505975d3
MP		 108 edma: edma@49000000 {
109 compatible = "ti,edma3";
110 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
111 reg = <0x49000000 0x10000>,
112 <0x44e10f90 0x10>;
113 interrupts = <12 13 14>;
114 #dma-cells = <1>;
115 dma-channels = <64>;
116 ti,edma-regions = <4>;
117 ti,edma-slots = <256>;
118 };
119
b918e2c0 120 gpio0: gpio@44e07000 {
5fc0b42a
AC		 121 compatible = "ti,omap4-gpio";
122 ti,hwmods = "gpio1";
123 gpio-controller;
124 #gpio-cells = <2>;
125 interrupt-controller;
5eac0eb7 126 #interrupt-cells = <2>;
4462b31c 127 reg = <0x44e07000 0x1000>;
4462b31c 128 interrupts = <96>;
5fc0b42a
AC		 129 };
130
b918e2c0 131 gpio1: gpio@4804c000 {
5fc0b42a
AC		 132 compatible = "ti,omap4-gpio";
133 ti,hwmods = "gpio2";
134 gpio-controller;
135 #gpio-cells = <2>;
136 interrupt-controller;
5eac0eb7 137 #interrupt-cells = <2>;
4462b31c 138 reg = <0x4804c000 0x1000>;
4462b31c 139 interrupts = <98>;
5fc0b42a
AC		 140 };
141
b918e2c0 142 gpio2: gpio@481ac000 {
5fc0b42a
AC		 143 compatible = "ti,omap4-gpio";
144 ti,hwmods = "gpio3";
145 gpio-controller;
146 #gpio-cells = <2>;
147 interrupt-controller;
5eac0eb7 148 #interrupt-cells = <2>;
4462b31c 149 reg = <0x481ac000 0x1000>;
4462b31c 150 interrupts = <32>;
5fc0b42a
AC		 151 };
152
b918e2c0 153 gpio3: gpio@481ae000 {
5fc0b42a
AC		 154 compatible = "ti,omap4-gpio";
155 ti,hwmods = "gpio4";
156 gpio-controller;
157 #gpio-cells = <2>;
158 interrupt-controller;
5eac0eb7 159 #interrupt-cells = <2>;
4462b31c 160 reg = <0x481ae000 0x1000>;
4462b31c 161 interrupts = <62>;
5fc0b42a
AC		 162 };
163
dde3b0d6 164 uart0: serial@44e09000 {
5fc0b42a
AC		 165 compatible = "ti,omap3-uart";
166 ti,hwmods = "uart1";
167 clock-frequency = <48000000>;
4462b31c 168 reg = <0x44e09000 0x2000>;
4462b31c 169 interrupts = <72>;
53d91034 170 status = "disabled";
5fc0b42a
AC		 171 };
172
dde3b0d6 173 uart1: serial@48022000 {
5fc0b42a
AC		 174 compatible = "ti,omap3-uart";
175 ti,hwmods = "uart2";
176 clock-frequency = <48000000>;
4462b31c 177 reg = <0x48022000 0x2000>;
4462b31c 178 interrupts = <73>;
53d91034 179 status = "disabled";
5fc0b42a
AC		 180 };
181
dde3b0d6 182 uart2: serial@48024000 {
5fc0b42a
AC		 183 compatible = "ti,omap3-uart";
184 ti,hwmods = "uart3";
185 clock-frequency = <48000000>;
4462b31c 186 reg = <0x48024000 0x2000>;
4462b31c 187 interrupts = <74>;
53d91034 188 status = "disabled";
5fc0b42a
AC		 189 };
190
dde3b0d6 191 uart3: serial@481a6000 {
5fc0b42a
AC		 192 compatible = "ti,omap3-uart";
193 ti,hwmods = "uart4";
194 clock-frequency = <48000000>;
4462b31c 195 reg = <0x481a6000 0x2000>;
4462b31c 196 interrupts = <44>;
53d91034 197 status = "disabled";
5fc0b42a
AC		 198 };
199
dde3b0d6 200 uart4: serial@481a8000 {
5fc0b42a
AC		 201 compatible = "ti,omap3-uart";
202 ti,hwmods = "uart5";
203 clock-frequency = <48000000>;
4462b31c 204 reg = <0x481a8000 0x2000>;
4462b31c 205 interrupts = <45>;
53d91034 206 status = "disabled";
5fc0b42a
AC		 207 };
208
dde3b0d6 209 uart5: serial@481aa000 {
5fc0b42a
AC		 210 compatible = "ti,omap3-uart";
211 ti,hwmods = "uart6";
212 clock-frequency = <48000000>;
4462b31c 213 reg = <0x481aa000 0x2000>;
4462b31c 214 interrupts = <46>;
53d91034 215 status = "disabled";
5fc0b42a
AC		 216 };
217
b918e2c0 218 i2c0: i2c@44e0b000 {
5fc0b42a
AC		 219 compatible = "ti,omap4-i2c";
220 #address-cells = <1>;
221 #size-cells = <0>;
222 ti,hwmods = "i2c1";
4462b31c 223 reg = <0x44e0b000 0x1000>;
4462b31c 224 interrupts = <70>;
53d91034 225 status = "disabled";
5fc0b42a
AC		 226 };
227
b918e2c0 228 i2c1: i2c@4802a000 {
5fc0b42a
AC		 229 compatible = "ti,omap4-i2c";
230 #address-cells = <1>;
231 #size-cells = <0>;
232 ti,hwmods = "i2c2";
4462b31c 233 reg = <0x4802a000 0x1000>;
4462b31c 234 interrupts = <71>;
53d91034 235 status = "disabled";
5fc0b42a
AC		 236 };
237
b918e2c0 238 i2c2: i2c@4819c000 {
5fc0b42a
AC		 239 compatible = "ti,omap4-i2c";
240 #address-cells = <1>;
241 #size-cells = <0>;
242 ti,hwmods = "i2c3";
4462b31c 243 reg = <0x4819c000 0x1000>;
4462b31c 244 interrupts = <30>;
53d91034 245 status = "disabled";
5fc0b42a 246 };
5f789ebc
AM		 247
248 wdt2: wdt@44e35000 {
249 compatible = "ti,omap3-wdt";
250 ti,hwmods = "wd_timer2";
4462b31c 251 reg = <0x44e35000 0x1000>;
4462b31c 252 interrupts = <91>;
5f789ebc 253 };
059b185d
AC		 254
255 dcan0: d_can@481cc000 {
256 compatible = "bosch,d_can";
257 ti,hwmods = "d_can0";
f178c015
AC		 258 reg = <0x481cc000 0x2000
259 0x44e10644 0x4>;
059b185d 260 interrupts = <52>;
059b185d
AC		 261 status = "disabled";
262 };
263
264 dcan1: d_can@481d0000 {
265 compatible = "bosch,d_can";
266 ti,hwmods = "d_can1";
f178c015
AC		 267 reg = <0x481d0000 0x2000
268 0x44e10644 0x4>;
059b185d 269 interrupts = <55>;
059b185d
AC		 270 status = "disabled";
271 };
fab8ad0b
JH		 272
273 timer1: timer@44e31000 {
002e1ec5 274 compatible = "ti,am335x-timer-1ms";
fab8ad0b
JH		 275 reg = <0x44e31000 0x400>;
276 interrupts = <67>;
277 ti,hwmods = "timer1";
278 ti,timer-alwon;
279 };
280
281 timer2: timer@48040000 {
002e1ec5 282 compatible = "ti,am335x-timer";
fab8ad0b
JH		 283 reg = <0x48040000 0x400>;
284 interrupts = <68>;
285 ti,hwmods = "timer2";
286 };
287
288 timer3: timer@48042000 {
002e1ec5 289 compatible = "ti,am335x-timer";
fab8ad0b
JH		 290 reg = <0x48042000 0x400>;
291 interrupts = <69>;
292 ti,hwmods = "timer3";
293 };
294
295 timer4: timer@48044000 {
002e1ec5 296 compatible = "ti,am335x-timer";
fab8ad0b
JH		 297 reg = <0x48044000 0x400>;
298 interrupts = <92>;
299 ti,hwmods = "timer4";
300 ti,timer-pwm;
301 };
302
303 timer5: timer@48046000 {
002e1ec5 304 compatible = "ti,am335x-timer";
fab8ad0b
JH		 305 reg = <0x48046000 0x400>;
306 interrupts = <93>;
307 ti,hwmods = "timer5";
308 ti,timer-pwm;
309 };
310
311 timer6: timer@48048000 {
002e1ec5 312 compatible = "ti,am335x-timer";
fab8ad0b
JH		 313 reg = <0x48048000 0x400>;
314 interrupts = <94>;
315 ti,hwmods = "timer6";
316 ti,timer-pwm;
317 };
318
319 timer7: timer@4804a000 {
002e1ec5 320 compatible = "ti,am335x-timer";
fab8ad0b
JH		 321 reg = <0x4804a000 0x400>;
322 interrupts = <95>;
323 ti,hwmods = "timer7";
324 ti,timer-pwm;
325 };
0d935c16
AM		 326
327 rtc@44e3e000 {
328 compatible = "ti,da830-rtc";
329 reg = <0x44e3e000 0x1000>;
330 interrupts = <75
331 76>;
332 ti,hwmods = "rtc";
333 };
9fd3c748
PA		 334
335 spi0: spi@48030000 {
336 compatible = "ti,omap4-mcspi";
337 #address-cells = <1>;
338 #size-cells = <0>;
339 reg = <0x48030000 0x400>;
7b3754c6 340 interrupts = <65>;
9fd3c748
PA		 341 ti,spi-num-cs = <2>;
342 ti,hwmods = "spi0";
343 status = "disabled";
344 };
345
346 spi1: spi@481a0000 {
347 compatible = "ti,omap4-mcspi";
348 #address-cells = <1>;
349 #size-cells = <0>;
350 reg = <0x481a0000 0x400>;
7b3754c6 351 interrupts = <125>;
9fd3c748
PA		 352 ti,spi-num-cs = <2>;
353 ti,hwmods = "spi1";
354 status = "disabled";
355 };
35b47fbb 356
97238b35
SAS		 357 usb: usb@47400000 {
358 compatible = "ti,am33xx-usb";
359 reg = <0x47400000 0x1000>;
360 ranges;
361 #address-cells = <1>;
362 #size-cells = <1>;
35b47fbb 363 ti,hwmods = "usb_otg_hs";
97238b35
SAS		 364 status = "disabled";
365
366 ctrl_mod: control@44e10000 {
367 compatible = "ti,am335x-usb-ctrl-module";
368 reg = <0x44e10620 0x10
369 0x44e10648 0x4>;
370 reg-names = "phy_ctrl", "wakeup";
371 status = "disabled";
372 };
373
c031a7d4 374 usb0_phy: usb-phy@47401300 {
97238b35
SAS		 375 compatible = "ti,am335x-usb-phy";
376 reg = <0x47401300 0x100>;
377 reg-names = "phy";
378 status = "disabled";
379 ti,ctrl_mod = <&ctrl_mod>;
380 };
381
382 usb0: usb@47401000 {
383 compatible = "ti,musb-am33xx";
97238b35 384 status = "disabled";
c031a7d4
SAS		 385 reg = <0x47401400 0x400
386 0x47401000 0x200>;
387 reg-names = "mc", "control";
388
389 interrupts = <18>;
390 interrupt-names = "mc";
391 dr_mode = "otg";
392 mentor,multipoint = <1>;
393 mentor,num-eps = <16>;
394 mentor,ram-bits = <12>;
395 mentor,power = <500>;
396 phys = <&usb0_phy>;
9b3452d1
SAS		 397
398 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
399 &cppi41dma 2 0 &cppi41dma 3 0
400 &cppi41dma 4 0 &cppi41dma 5 0
401 &cppi41dma 6 0 &cppi41dma 7 0
402 &cppi41dma 8 0 &cppi41dma 9 0
403 &cppi41dma 10 0 &cppi41dma 11 0
404 &cppi41dma 12 0 &cppi41dma 13 0
405 &cppi41dma 14 0 &cppi41dma 0 1
406 &cppi41dma 1 1 &cppi41dma 2 1
407 &cppi41dma 3 1 &cppi41dma 4 1
408 &cppi41dma 5 1 &cppi41dma 6 1
409 &cppi41dma 7 1 &cppi41dma 8 1
410 &cppi41dma 9 1 &cppi41dma 10 1
411 &cppi41dma 11 1 &cppi41dma 12 1
412 &cppi41dma 13 1 &cppi41dma 14 1>;
413 dma-names =
414 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
415 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
416 "rx14", "rx15",
417 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
418 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
419 "tx14", "tx15";
97238b35
SAS		 420 };
421
c031a7d4 422 usb1_phy: usb-phy@47401b00 {
97238b35
SAS		 423 compatible = "ti,am335x-usb-phy";
424 reg = <0x47401b00 0x100>;
425 reg-names = "phy";
426 status = "disabled";
427 ti,ctrl_mod = <&ctrl_mod>;
428 };
429
430 usb1: usb@47401800 {
431 compatible = "ti,musb-am33xx";
97238b35 432 status = "disabled";
c031a7d4
SAS		 433 reg = <0x47401c00 0x400
434 0x47401800 0x200>;
435 reg-names = "mc", "control";
436 interrupts = <19>;
437 interrupt-names = "mc";
438 dr_mode = "otg";
439 mentor,multipoint = <1>;
440 mentor,num-eps = <16>;
441 mentor,ram-bits = <12>;
442 mentor,power = <500>;
443 phys = <&usb1_phy>;
9b3452d1
SAS		 444
445 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
446 &cppi41dma 17 0 &cppi41dma 18 0
447 &cppi41dma 19 0 &cppi41dma 20 0
448 &cppi41dma 21 0 &cppi41dma 22 0
449 &cppi41dma 23 0 &cppi41dma 24 0
450 &cppi41dma 25 0 &cppi41dma 26 0
451 &cppi41dma 27 0 &cppi41dma 28 0
452 &cppi41dma 29 0 &cppi41dma 15 1
453 &cppi41dma 16 1 &cppi41dma 17 1
454 &cppi41dma 18 1 &cppi41dma 19 1
455 &cppi41dma 20 1 &cppi41dma 21 1
456 &cppi41dma 22 1 &cppi41dma 23 1
457 &cppi41dma 24 1 &cppi41dma 25 1
458 &cppi41dma 26 1 &cppi41dma 27 1
459 &cppi41dma 28 1 &cppi41dma 29 1>;
460 dma-names =
461 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
462 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
463 "rx14", "rx15",
464 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
465 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
466 "tx14", "tx15";
97238b35 467 };
9b3452d1 468
c031a7d4 469 cppi41dma: dma-controller@07402000 {
9b3452d1
SAS		 470 compatible = "ti,am3359-cppi41";
471 reg = <0x47400000 0x1000
472 0x47402000 0x1000
473 0x47403000 0x1000
474 0x47404000 0x4000>;
3b6394b4 475 reg-names = "glue", "controller", "scheduler", "queuemgr";
9b3452d1
SAS		 476 interrupts = <17>;
477 interrupt-names = "glue";
478 #dma-cells = <2>;
479 #dma-channels = <30>;
480 #dma-requests = <256>;
481 status = "disabled";
482 };
35b47fbb 483 };
6be35c70 484
0a7486c9
PA		 485 epwmss0: epwmss@48300000 {
486 compatible = "ti,am33xx-pwmss";
487 reg = <0x48300000 0x10>;
488 ti,hwmods = "epwmss0";
489 #address-cells = <1>;
490 #size-cells = <1>;
491 status = "disabled";
492 ranges = <0x48300100 0x48300100 0x80 /* ECAP */
493 0x48300180 0x48300180 0x80 /* EQEP */
494 0x48300200 0x48300200 0x80>; /* EHRPWM */
495
496 ecap0: ecap@48300100 {
497 compatible = "ti,am33xx-ecap";
498 #pwm-cells = <3>;
499 reg = <0x48300100 0x80>;
500 ti,hwmods = "ecap0";
501 status = "disabled";
502 };
503
504 ehrpwm0: ehrpwm@48300200 {
505 compatible = "ti,am33xx-ehrpwm";
506 #pwm-cells = <3>;
507 reg = <0x48300200 0x80>;
508 ti,hwmods = "ehrpwm0";
509 status = "disabled";
510 };
511 };
512
513 epwmss1: epwmss@48302000 {
514 compatible = "ti,am33xx-pwmss";
515 reg = <0x48302000 0x10>;
516 ti,hwmods = "epwmss1";
517 #address-cells = <1>;
518 #size-cells = <1>;
519 status = "disabled";
520 ranges = <0x48302100 0x48302100 0x80 /* ECAP */
521 0x48302180 0x48302180 0x80 /* EQEP */
522 0x48302200 0x48302200 0x80>; /* EHRPWM */
523
524 ecap1: ecap@48302100 {
525 compatible = "ti,am33xx-ecap";
526 #pwm-cells = <3>;
527 reg = <0x48302100 0x80>;
528 ti,hwmods = "ecap1";
529 status = "disabled";
530 };
531
532 ehrpwm1: ehrpwm@48302200 {
533 compatible = "ti,am33xx-ehrpwm";
534 #pwm-cells = <3>;
535 reg = <0x48302200 0x80>;
536 ti,hwmods = "ehrpwm1";
537 status = "disabled";
538 };
539 };
540
541 epwmss2: epwmss@48304000 {
542 compatible = "ti,am33xx-pwmss";
543 reg = <0x48304000 0x10>;
544 ti,hwmods = "epwmss2";
545 #address-cells = <1>;
546 #size-cells = <1>;
547 status = "disabled";
548 ranges = <0x48304100 0x48304100 0x80 /* ECAP */
549 0x48304180 0x48304180 0x80 /* EQEP */
550 0x48304200 0x48304200 0x80>; /* EHRPWM */
551
552 ecap2: ecap@48304100 {
553 compatible = "ti,am33xx-ecap";
554 #pwm-cells = <3>;
555 reg = <0x48304100 0x80>;
556 ti,hwmods = "ecap2";
557 status = "disabled";
558 };
559
560 ehrpwm2: ehrpwm@48304200 {
561 compatible = "ti,am33xx-ehrpwm";
562 #pwm-cells = <3>;
563 reg = <0x48304200 0x80>;
564 ti,hwmods = "ehrpwm2";
565 status = "disabled";
566 };
567 };
568
1a39a65c
M		 569 mac: ethernet@4a100000 {
570 compatible = "ti,cpsw";
571 ti,hwmods = "cpgmac0";
572 cpdma_channels = <8>;
573 ale_entries = <1024>;
574 bd_ram_size = <0x2000>;
575 no_bd_ram = <0>;
576 rx_descs = <64>;
577 mac_control = <0x20>;
578 slaves = <2>;
e86ac13b 579 active_slave = <0>;
1a39a65c
M		 580 cpts_clock_mult = <0x80000000>;
581 cpts_clock_shift = <29>;
582 reg = <0x4a100000 0x800
583 0x4a101200 0x100>;
584 #address-cells = <1>;
585 #size-cells = <1>;
586 interrupt-parent = <&intc>;
587 /*
588 * c0_rx_thresh_pend
589 * c0_rx_pend
590 * c0_tx_pend
591 * c0_misc_pend
592 */
593 interrupts = <40 41 42 43>;
594 ranges;
595
596 davinci_mdio: mdio@4a101000 {
597 compatible = "ti,davinci_mdio";
598 #address-cells = <1>;
599 #size-cells = <0>;
600 ti,hwmods = "davinci_mdio";
601 bus_freq = <1000000>;
602 reg = <0x4a101000 0x100>;
603 };
604
605 cpsw_emac0: slave@4a100200 {
606 /* Filled in by U-Boot */
607 mac-address = [ 00 00 00 00 00 00 ];
608 };
609
610 cpsw_emac1: slave@4a100300 {
611 /* Filled in by U-Boot */
612 mac-address = [ 00 00 00 00 00 00 ];
613 };
1a39a65c 614 };
f6575c90
VB		 615
616 ocmcram: ocmcram@40300000 {
617 compatible = "ti,am3352-ocmcram";
618 reg = <0x40300000 0x10000>;
619 ti,hwmods = "ocmcram";
f6575c90
VB		 620 };
621
622 wkup_m3: wkup_m3@44d00000 {
623 compatible = "ti,am3353-wkup-m3";
624 reg = <0x44d00000 0x4000 /* M3 UMEM */
625 0x44d80000 0x2000>; /* M3 DMEM */
626 ti,hwmods = "wkup_m3";
627 };
e45879ec 628
15e8246b
PA		 629 elm: elm@48080000 {
630 compatible = "ti,am3352-elm";
631 reg = <0x48080000 0x2000>;
632 interrupts = <4>;
633 ti,hwmods = "elm";
634 status = "disabled";
635 };
636
a82279dd
PR		 637 tscadc: tscadc@44e0d000 {
638 compatible = "ti,am3359-tscadc";
639 reg = <0x44e0d000 0x1000>;
640 interrupt-parent = <&intc>;
641 interrupts = <16>;
642 ti,hwmods = "adc_tsc";
643 status = "disabled";
644
645 tsc {
646 compatible = "ti,am3359-tsc";
647 };
648 am335x_adc: adc {
649 #io-channel-cells = <1>;
650 compatible = "ti,am3359-adc";
651 };
a82279dd
PR		 652 };
653
e45879ec
PA		 654 gpmc: gpmc@50000000 {
655 compatible = "ti,am3352-gpmc";
656 ti,hwmods = "gpmc";
657 reg = <0x50000000 0x2000>;
658 interrupts = <100>;
00dddcaa
LP		 659 gpmc,num-cs = <7>;
660 gpmc,num-waitpins = <2>;
e45879ec
PA		 661 #address-cells = <2>;
662 #size-cells = <1>;
663 status = "disabled";
664 };
5fc0b42a
AC		 665 };
666};
Linux 6.x block layer and io_uring tree(s)