[linux-2.6-block.git] / arch / arm / boot / dts / am33xx.dtsi

/*
 * Device Tree Source for AM33XX SoC
 *
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

#include <dt-bindings/gpio/gpio.h>

#include "skeleton.dtsi"

/ {
	compatible = "ti,am33xx";
	interrupt-parent = <&intc>;

	aliases {
		serial0 = &uart0;
		serial1 = &uart1;
		serial2 = &uart2;
		serial3 = &uart3;
		serial4 = &uart4;
		serial5 = &uart5;
		d_can0 = &dcan0;
		d_can1 = &dcan1;
	};

	cpus {
		cpu@0 {
			compatible = "arm,cortex-a8";

			/*
			 * To consider voltage drop between PMIC and SoC,
			 * tolerance value is reduced to 2% from 4% and
			 * voltage value is increased as a precaution.
			 */
			operating-points = <
				/* kHz    uV */
				720000  1285000
				600000  1225000
				500000  1125000
				275000  1125000
			>;
			voltage-tolerance = <2>; /* 2 percentage */
			clock-latency = <300000>; /* From omap-cpufreq driver */
		};
	};

	/*
	 * The soc node represents the soc top level view. It is uses for IPs
	 * that are not memory mapped in the MPU view or for the MPU itself.
	 */
	soc {
		compatible = "ti,omap-infra";
		mpu {
			compatible = "ti,omap3-mpu";
			ti,hwmods = "mpu";
		};
	};

	am33xx_pinmux: pinmux@44e10800 {
		compatible = "pinctrl-single";
		reg = <0x44e10800 0x0238>;
		#address-cells = <1>;
		#size-cells = <0>;
		pinctrl-single,register-width = <32>;
		pinctrl-single,function-mask = <0x7f>;
	};

	/*
	 * XXX: Use a flat representation of the AM33XX interconnect.
	 * The real AM33XX interconnect network is quite complex.Since
	 * that will not bring real advantage to represent that in DT
	 * for the moment, just use a fake OCP bus entry to represent
	 * the whole bus hierarchy.
	 */
	ocp {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;
		ti,hwmods = "l3_main";

		intc: interrupt-controller@48200000 {
			compatible = "ti,omap2-intc";
			interrupt-controller;
			#interrupt-cells = <1>;
			ti,intc-size = <128>;
			reg = <0x48200000 0x1000>;
		};

		gpio0: gpio@44e07000 {
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio1";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <1>;
			reg = <0x44e07000 0x1000>;
			interrupts = <96>;
		};

		gpio1: gpio@4804c000 {
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio2";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <1>;
			reg = <0x4804c000 0x1000>;
			interrupts = <98>;
		};

		gpio2: gpio@481ac000 {
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio3";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <1>;
			reg = <0x481ac000 0x1000>;
			interrupts = <32>;
		};

		gpio3: gpio@481ae000 {
			compatible = "ti,omap4-gpio";
			ti,hwmods = "gpio4";
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <1>;
			reg = <0x481ae000 0x1000>;
			interrupts = <62>;
		};

		uart0: serial@44e09000 {
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart1";
			clock-frequency = <48000000>;
			reg = <0x44e09000 0x2000>;
			interrupts = <72>;
			status = "disabled";
		};

		uart1: serial@48022000 {
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart2";
			clock-frequency = <48000000>;
			reg = <0x48022000 0x2000>;
			interrupts = <73>;
			status = "disabled";
		};

		uart2: serial@48024000 {
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart3";
			clock-frequency = <48000000>;
			reg = <0x48024000 0x2000>;
			interrupts = <74>;
			status = "disabled";
		};

		uart3: serial@481a6000 {
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart4";
			clock-frequency = <48000000>;
			reg = <0x481a6000 0x2000>;
			interrupts = <44>;
			status = "disabled";
		};

		uart4: serial@481a8000 {
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart5";
			clock-frequency = <48000000>;
			reg = <0x481a8000 0x2000>;
			interrupts = <45>;
			status = "disabled";
		};

		uart5: serial@481aa000 {
			compatible = "ti,omap3-uart";
			ti,hwmods = "uart6";
			clock-frequency = <48000000>;
			reg = <0x481aa000 0x2000>;
			interrupts = <46>;
			status = "disabled";
		};

		i2c0: i2c@44e0b000 {
			compatible = "ti,omap4-i2c";
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "i2c1";
			reg = <0x44e0b000 0x1000>;
			interrupts = <70>;
			status = "disabled";
		};

		i2c1: i2c@4802a000 {
			compatible = "ti,omap4-i2c";
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "i2c2";
			reg = <0x4802a000 0x1000>;
			interrupts = <71>;
			status = "disabled";
		};

		i2c2: i2c@4819c000 {
			compatible = "ti,omap4-i2c";
			#address-cells = <1>;
			#size-cells = <0>;
			ti,hwmods = "i2c3";
			reg = <0x4819c000 0x1000>;
			interrupts = <30>;
			status = "disabled";
		};

		wdt2: wdt@44e35000 {
			compatible = "ti,omap3-wdt";
			ti,hwmods = "wd_timer2";
			reg = <0x44e35000 0x1000>;
			interrupts = <91>;
		};

		dcan0: d_can@481cc000 {
			compatible = "bosch,d_can";
			ti,hwmods = "d_can0";
			reg = <0x481cc000 0x2000
				0x44e10644 0x4>;
			interrupts = <52>;
			status = "disabled";
		};

		dcan1: d_can@481d0000 {
			compatible = "bosch,d_can";
			ti,hwmods = "d_can1";
			reg = <0x481d0000 0x2000
				0x44e10644 0x4>;
			interrupts = <55>;
			status = "disabled";
		};

		timer1: timer@44e31000 {
			compatible = "ti,am335x-timer-1ms";
			reg = <0x44e31000 0x400>;
			interrupts = <67>;
			ti,hwmods = "timer1";
			ti,timer-alwon;
		};

		timer2: timer@48040000 {
			compatible = "ti,am335x-timer";
			reg = <0x48040000 0x400>;
			interrupts = <68>;
			ti,hwmods = "timer2";
		};

		timer3: timer@48042000 {
			compatible = "ti,am335x-timer";
			reg = <0x48042000 0x400>;
			interrupts = <69>;
			ti,hwmods = "timer3";
		};

		timer4: timer@48044000 {
			compatible = "ti,am335x-timer";
			reg = <0x48044000 0x400>;
			interrupts = <92>;
			ti,hwmods = "timer4";
			ti,timer-pwm;
		};

		timer5: timer@48046000 {
			compatible = "ti,am335x-timer";
			reg = <0x48046000 0x400>;
			interrupts = <93>;
			ti,hwmods = "timer5";
			ti,timer-pwm;
		};

		timer6: timer@48048000 {
			compatible = "ti,am335x-timer";
			reg = <0x48048000 0x400>;
			interrupts = <94>;
			ti,hwmods = "timer6";
			ti,timer-pwm;
		};

		timer7: timer@4804a000 {
			compatible = "ti,am335x-timer";
			reg = <0x4804a000 0x400>;
			interrupts = <95>;
			ti,hwmods = "timer7";
			ti,timer-pwm;
		};

		rtc@44e3e000 {
			compatible = "ti,da830-rtc";
			reg = <0x44e3e000 0x1000>;
			interrupts = <75
				      76>;
			ti,hwmods = "rtc";
		};

		spi0: spi@48030000 {
			compatible = "ti,omap4-mcspi";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x48030000 0x400>;
			interrupts = <65>;
			ti,spi-num-cs = <2>;
			ti,hwmods = "spi0";
			status = "disabled";
		};

		spi1: spi@481a0000 {
			compatible = "ti,omap4-mcspi";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x481a0000 0x400>;
			interrupts = <125>;
			ti,spi-num-cs = <2>;
			ti,hwmods = "spi1";
			status = "disabled";
		};

		usb@47400000 {
			compatible = "ti,musb-am33xx";
			reg = <0x47400000 0x1000	/* usbss */
			       0x47401000 0x800		/* musb instance 0 */
			       0x47401800 0x800>;	/* musb instance 1 */
			interrupts = <17		/* usbss */
				      18		/* musb instance 0 */
				      19>;		/* musb instance 1 */
			multipoint = <1>;
			num-eps = <16>;
			ram-bits = <12>;
			port0-mode = <3>;
			port1-mode = <3>;
			power = <250>;
			ti,hwmods = "usb_otg_hs";
		};

		mac: ethernet@4a100000 {
			compatible = "ti,cpsw";
			ti,hwmods = "cpgmac0";
			cpdma_channels = <8>;
			ale_entries = <1024>;
			bd_ram_size = <0x2000>;
			no_bd_ram = <0>;
			rx_descs = <64>;
			mac_control = <0x20>;
			slaves = <2>;
			active_slave = <0>;
			cpts_clock_mult = <0x80000000>;
			cpts_clock_shift = <29>;
			reg = <0x4a100000 0x800
			       0x4a101200 0x100>;
			#address-cells = <1>;
			#size-cells = <1>;
			interrupt-parent = <&intc>;
			/*
			 * c0_rx_thresh_pend
			 * c0_rx_pend
			 * c0_tx_pend
			 * c0_misc_pend
			 */
			interrupts = <40 41 42 43>;
			ranges;

			davinci_mdio: mdio@4a101000 {
				compatible = "ti,davinci_mdio";
				#address-cells = <1>;
				#size-cells = <0>;
				ti,hwmods = "davinci_mdio";
				bus_freq = <1000000>;
				reg = <0x4a101000 0x100>;
			};

			cpsw_emac0: slave@4a100200 {
				/* Filled in by U-Boot */
				mac-address = [ 00 00 00 00 00 00 ];
			};

			cpsw_emac1: slave@4a100300 {
				/* Filled in by U-Boot */
				mac-address = [ 00 00 00 00 00 00 ];
			};
		};

		ocmcram: ocmcram@40300000 {
			compatible = "ti,am3352-ocmcram";
			reg = <0x40300000 0x10000>;
			ti,hwmods = "ocmcram";
			ti,no_idle_on_suspend;
		};

		wkup_m3: wkup_m3@44d00000 {
			compatible = "ti,am3353-wkup-m3";
			reg = <0x44d00000 0x4000	/* M3 UMEM */
			       0x44d80000 0x2000>;	/* M3 DMEM */
			ti,hwmods = "wkup_m3";
		};

		elm: elm@48080000 {
			compatible = "ti,am3352-elm";
			reg = <0x48080000 0x2000>;
			interrupts = <4>;
			ti,hwmods = "elm";
			status = "disabled";
		};

		gpmc: gpmc@50000000 {
			compatible = "ti,am3352-gpmc";
			ti,hwmods = "gpmc";
			reg = <0x50000000 0x2000>;
			interrupts = <100>;
			gpmc,num-cs = <7>;
			gpmc,num-waitpins = <2>;
			#address-cells = <2>;
			#size-cells = <1>;
			status = "disabled";
		};
	};
};
Commit	Line	Data
5fc0b42a AC	1	/*
	2	* Device Tree Source for AM33XX SoC
	3	*
	4	* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
	5	*
	6	* This file is licensed under the terms of the GNU General Public License
	7	* version 2. This program is licensed "as is" without any warranty of any
	8	* kind, whether express or implied.
	9	*/
	10
e94233c2 FV	11	#include <dt-bindings/gpio/gpio.h>
e94233c2 FV	12
eb33ef66	13	#include "skeleton.dtsi"
5fc0b42a AC	14
	15	/ {
	16	compatible = "ti,am33xx";
4c94ac29	17	interrupt-parent = <&intc>;
5fc0b42a AC	18
5fc0b42a AC	19	aliases {
dde3b0d6 VH	20	serial0 = &uart0;
	21	serial1 = &uart1;
	22	serial2 = &uart2;
	23	serial3 = &uart3;
	24	serial4 = &uart4;
	25	serial5 = &uart5;
7a57ee87 AC	26	d_can0 = &dcan0;
7a57ee87 AC	27	d_can1 = &dcan1;
5fc0b42a AC	28	};
	29
	30	cpus {
	31	cpu@0 {
	32	compatible = "arm,cortex-a8";
efeedcf2 AC	33
	34	/*
	35	* To consider voltage drop between PMIC and SoC,
	36	* tolerance value is reduced to 2% from 4% and
	37	* voltage value is increased as a precaution.
	38	*/
	39	operating-points = <
	40	/* kHz uV */
	41	720000 1285000
	42	600000 1225000
	43	500000 1125000
	44	275000 1125000
	45	>;
	46	voltage-tolerance = <2>; /* 2 percentage */
	47	clock-latency = <300000>; /* From omap-cpufreq driver */
5fc0b42a AC	48	};
	49	};
	50
	51	/*
	52	* The soc node represents the soc top level view. It is uses for IPs
	53	* that are not memory mapped in the MPU view or for the MPU itself.
	54	*/
	55	soc {
	56	compatible = "ti,omap-infra";
	57	mpu {
	58	compatible = "ti,omap3-mpu";
	59	ti,hwmods = "mpu";
	60	};
	61	};
	62
b552dfc4 AC	63	am33xx_pinmux: pinmux@44e10800 {
	64	compatible = "pinctrl-single";
	65	reg = <0x44e10800 0x0238>;
	66	#address-cells = <1>;
	67	#size-cells = <0>;
	68	pinctrl-single,register-width = <32>;
	69	pinctrl-single,function-mask = <0x7f>;
	70	};
	71
5fc0b42a AC	72	/*
	73	* XXX: Use a flat representation of the AM33XX interconnect.
	74	* The real AM33XX interconnect network is quite complex.Since
	75	* that will not bring real advantage to represent that in DT
	76	* for the moment, just use a fake OCP bus entry to represent
	77	* the whole bus hierarchy.
	78	*/
	79	ocp {
	80	compatible = "simple-bus";
	81	#address-cells = <1>;
	82	#size-cells = <1>;
	83	ranges;
	84	ti,hwmods = "l3_main";
	85
	86	intc: interrupt-controller@48200000 {
	87	compatible = "ti,omap2-intc";
	88	interrupt-controller;
	89	#interrupt-cells = <1>;
	90	ti,intc-size = <128>;
	91	reg = <0x48200000 0x1000>;
	92	};
	93
b918e2c0	94	gpio0: gpio@44e07000 {
5fc0b42a AC	95	compatible = "ti,omap4-gpio";
	96	ti,hwmods = "gpio1";
	97	gpio-controller;
	98	#gpio-cells = <2>;
	99	interrupt-controller;
	100	#interrupt-cells = <1>;
4462b31c	101	reg = <0x44e07000 0x1000>;
4462b31c	102	interrupts = <96>;
5fc0b42a AC	103	};
5fc0b42a AC	104
b918e2c0	105	gpio1: gpio@4804c000 {
5fc0b42a AC	106	compatible = "ti,omap4-gpio";
	107	ti,hwmods = "gpio2";
	108	gpio-controller;
	109	#gpio-cells = <2>;
	110	interrupt-controller;
	111	#interrupt-cells = <1>;
4462b31c	112	reg = <0x4804c000 0x1000>;
4462b31c	113	interrupts = <98>;
5fc0b42a AC	114	};
5fc0b42a AC	115
b918e2c0	116	gpio2: gpio@481ac000 {
5fc0b42a AC	117	compatible = "ti,omap4-gpio";
	118	ti,hwmods = "gpio3";
	119	gpio-controller;
	120	#gpio-cells = <2>;
	121	interrupt-controller;
	122	#interrupt-cells = <1>;
4462b31c	123	reg = <0x481ac000 0x1000>;
4462b31c	124	interrupts = <32>;
5fc0b42a AC	125	};
5fc0b42a AC	126
b918e2c0	127	gpio3: gpio@481ae000 {
5fc0b42a AC	128	compatible = "ti,omap4-gpio";
	129	ti,hwmods = "gpio4";
	130	gpio-controller;
	131	#gpio-cells = <2>;
	132	interrupt-controller;
	133	#interrupt-cells = <1>;
4462b31c	134	reg = <0x481ae000 0x1000>;
4462b31c	135	interrupts = <62>;
5fc0b42a AC	136	};
5fc0b42a AC	137
dde3b0d6	138	uart0: serial@44e09000 {
5fc0b42a AC	139	compatible = "ti,omap3-uart";
	140	ti,hwmods = "uart1";
	141	clock-frequency = <48000000>;
4462b31c	142	reg = <0x44e09000 0x2000>;
4462b31c	143	interrupts = <72>;
53d91034	144	status = "disabled";
5fc0b42a AC	145	};
5fc0b42a AC	146
dde3b0d6	147	uart1: serial@48022000 {
5fc0b42a AC	148	compatible = "ti,omap3-uart";
	149	ti,hwmods = "uart2";
	150	clock-frequency = <48000000>;
4462b31c	151	reg = <0x48022000 0x2000>;
4462b31c	152	interrupts = <73>;
53d91034	153	status = "disabled";
5fc0b42a AC	154	};
5fc0b42a AC	155
dde3b0d6	156	uart2: serial@48024000 {
5fc0b42a AC	157	compatible = "ti,omap3-uart";
	158	ti,hwmods = "uart3";
	159	clock-frequency = <48000000>;
4462b31c	160	reg = <0x48024000 0x2000>;
4462b31c	161	interrupts = <74>;
53d91034	162	status = "disabled";
5fc0b42a AC	163	};
5fc0b42a AC	164
dde3b0d6	165	uart3: serial@481a6000 {
5fc0b42a AC	166	compatible = "ti,omap3-uart";
	167	ti,hwmods = "uart4";
	168	clock-frequency = <48000000>;
4462b31c	169	reg = <0x481a6000 0x2000>;
4462b31c	170	interrupts = <44>;
53d91034	171	status = "disabled";
5fc0b42a AC	172	};
5fc0b42a AC	173
dde3b0d6	174	uart4: serial@481a8000 {
5fc0b42a AC	175	compatible = "ti,omap3-uart";
	176	ti,hwmods = "uart5";
	177	clock-frequency = <48000000>;
4462b31c	178	reg = <0x481a8000 0x2000>;
4462b31c	179	interrupts = <45>;
53d91034	180	status = "disabled";
5fc0b42a AC	181	};
5fc0b42a AC	182
dde3b0d6	183	uart5: serial@481aa000 {
5fc0b42a AC	184	compatible = "ti,omap3-uart";
	185	ti,hwmods = "uart6";
	186	clock-frequency = <48000000>;
4462b31c	187	reg = <0x481aa000 0x2000>;
4462b31c	188	interrupts = <46>;
53d91034	189	status = "disabled";
5fc0b42a AC	190	};
5fc0b42a AC	191
b918e2c0	192	i2c0: i2c@44e0b000 {
5fc0b42a AC	193	compatible = "ti,omap4-i2c";
	194	#address-cells = <1>;
	195	#size-cells = <0>;
	196	ti,hwmods = "i2c1";
4462b31c	197	reg = <0x44e0b000 0x1000>;
4462b31c	198	interrupts = <70>;
53d91034	199	status = "disabled";
5fc0b42a AC	200	};
5fc0b42a AC	201
b918e2c0	202	i2c1: i2c@4802a000 {
5fc0b42a AC	203	compatible = "ti,omap4-i2c";
	204	#address-cells = <1>;
	205	#size-cells = <0>;
	206	ti,hwmods = "i2c2";
4462b31c	207	reg = <0x4802a000 0x1000>;
4462b31c	208	interrupts = <71>;
53d91034	209	status = "disabled";
5fc0b42a AC	210	};
5fc0b42a AC	211
b918e2c0	212	i2c2: i2c@4819c000 {
5fc0b42a AC	213	compatible = "ti,omap4-i2c";
	214	#address-cells = <1>;
	215	#size-cells = <0>;
	216	ti,hwmods = "i2c3";
4462b31c	217	reg = <0x4819c000 0x1000>;
4462b31c	218	interrupts = <30>;
53d91034	219	status = "disabled";
5fc0b42a	220	};
5f789ebc AM	221
	222	wdt2: wdt@44e35000 {
	223	compatible = "ti,omap3-wdt";
	224	ti,hwmods = "wd_timer2";
4462b31c	225	reg = <0x44e35000 0x1000>;
4462b31c	226	interrupts = <91>;
5f789ebc	227	};
059b185d AC	228
	229	dcan0: d_can@481cc000 {
	230	compatible = "bosch,d_can";
	231	ti,hwmods = "d_can0";
f178c015 AC	232	reg = <0x481cc000 0x2000
f178c015 AC	233	0x44e10644 0x4>;
059b185d	234	interrupts = <52>;
059b185d AC	235	status = "disabled";
	236	};
	237
	238	dcan1: d_can@481d0000 {
	239	compatible = "bosch,d_can";
	240	ti,hwmods = "d_can1";
f178c015 AC	241	reg = <0x481d0000 0x2000
f178c015 AC	242	0x44e10644 0x4>;
059b185d	243	interrupts = <55>;
059b185d AC	244	status = "disabled";
059b185d AC	245	};
fab8ad0b JH	246
fab8ad0b JH	247	timer1: timer@44e31000 {
002e1ec5	248	compatible = "ti,am335x-timer-1ms";
fab8ad0b JH	249	reg = <0x44e31000 0x400>;
	250	interrupts = <67>;
	251	ti,hwmods = "timer1";
	252	ti,timer-alwon;
	253	};
	254
	255	timer2: timer@48040000 {
002e1ec5	256	compatible = "ti,am335x-timer";
fab8ad0b JH	257	reg = <0x48040000 0x400>;
	258	interrupts = <68>;
	259	ti,hwmods = "timer2";
	260	};
	261
	262	timer3: timer@48042000 {
002e1ec5	263	compatible = "ti,am335x-timer";
fab8ad0b JH	264	reg = <0x48042000 0x400>;
	265	interrupts = <69>;
	266	ti,hwmods = "timer3";
	267	};
	268
	269	timer4: timer@48044000 {
002e1ec5	270	compatible = "ti,am335x-timer";
fab8ad0b JH	271	reg = <0x48044000 0x400>;
	272	interrupts = <92>;
	273	ti,hwmods = "timer4";
	274	ti,timer-pwm;
	275	};
	276
	277	timer5: timer@48046000 {
002e1ec5	278	compatible = "ti,am335x-timer";
fab8ad0b JH	279	reg = <0x48046000 0x400>;
	280	interrupts = <93>;
	281	ti,hwmods = "timer5";
	282	ti,timer-pwm;
	283	};
	284
	285	timer6: timer@48048000 {
002e1ec5	286	compatible = "ti,am335x-timer";
fab8ad0b JH	287	reg = <0x48048000 0x400>;
	288	interrupts = <94>;
	289	ti,hwmods = "timer6";
	290	ti,timer-pwm;
	291	};
	292
	293	timer7: timer@4804a000 {
002e1ec5	294	compatible = "ti,am335x-timer";
fab8ad0b JH	295	reg = <0x4804a000 0x400>;
	296	interrupts = <95>;
	297	ti,hwmods = "timer7";
	298	ti,timer-pwm;
	299	};
0d935c16 AM	300
	301	rtc@44e3e000 {
	302	compatible = "ti,da830-rtc";
	303	reg = <0x44e3e000 0x1000>;
	304	interrupts = <75
	305	76>;
	306	ti,hwmods = "rtc";
	307	};
9fd3c748 PA	308
	309	spi0: spi@48030000 {
	310	compatible = "ti,omap4-mcspi";
	311	#address-cells = <1>;
	312	#size-cells = <0>;
	313	reg = <0x48030000 0x400>;
7b3754c6	314	interrupts = <65>;
9fd3c748 PA	315	ti,spi-num-cs = <2>;
	316	ti,hwmods = "spi0";
	317	status = "disabled";
	318	};
	319
	320	spi1: spi@481a0000 {
	321	compatible = "ti,omap4-mcspi";
	322	#address-cells = <1>;
	323	#size-cells = <0>;
	324	reg = <0x481a0000 0x400>;
7b3754c6	325	interrupts = <125>;
9fd3c748 PA	326	ti,spi-num-cs = <2>;
	327	ti,hwmods = "spi1";
	328	status = "disabled";
	329	};
35b47fbb AKG	330
	331	usb@47400000 {
	332	compatible = "ti,musb-am33xx";
	333	reg = <0x47400000 0x1000 /* usbss */
	334	0x47401000 0x800 /* musb instance 0 */
	335	0x47401800 0x800>; /* musb instance 1 */
	336	interrupts = <17 /* usbss */
	337	18 /* musb instance 0 */
	338	19>; /* musb instance 1 */
	339	multipoint = <1>;
	340	num-eps = <16>;
	341	ram-bits = <12>;
	342	port0-mode = <3>;
	343	port1-mode = <3>;
	344	power = <250>;
	345	ti,hwmods = "usb_otg_hs";
	346	};
6be35c70	347
1a39a65c M	348	mac: ethernet@4a100000 {
	349	compatible = "ti,cpsw";
	350	ti,hwmods = "cpgmac0";
	351	cpdma_channels = <8>;
	352	ale_entries = <1024>;
	353	bd_ram_size = <0x2000>;
	354	no_bd_ram = <0>;
	355	rx_descs = <64>;
	356	mac_control = <0x20>;
	357	slaves = <2>;
e86ac13b	358	active_slave = <0>;
1a39a65c M	359	cpts_clock_mult = <0x80000000>;
	360	cpts_clock_shift = <29>;
	361	reg = <0x4a100000 0x800
	362	0x4a101200 0x100>;
	363	#address-cells = <1>;
	364	#size-cells = <1>;
	365	interrupt-parent = <&intc>;
	366	/*
	367	* c0_rx_thresh_pend
	368	* c0_rx_pend
	369	* c0_tx_pend
	370	* c0_misc_pend
	371	*/
	372	interrupts = <40 41 42 43>;
	373	ranges;
	374
	375	davinci_mdio: mdio@4a101000 {
	376	compatible = "ti,davinci_mdio";
	377	#address-cells = <1>;
	378	#size-cells = <0>;
	379	ti,hwmods = "davinci_mdio";
	380	bus_freq = <1000000>;
	381	reg = <0x4a101000 0x100>;
	382	};
	383
	384	cpsw_emac0: slave@4a100200 {
	385	/* Filled in by U-Boot */
	386	mac-address = [ 00 00 00 00 00 00 ];
	387	};
	388
	389	cpsw_emac1: slave@4a100300 {
	390	/* Filled in by U-Boot */
	391	mac-address = [ 00 00 00 00 00 00 ];
	392	};
1a39a65c	393	};
f6575c90 VB	394
	395	ocmcram: ocmcram@40300000 {
	396	compatible = "ti,am3352-ocmcram";
	397	reg = <0x40300000 0x10000>;
	398	ti,hwmods = "ocmcram";
	399	ti,no_idle_on_suspend;
	400	};
	401
	402	wkup_m3: wkup_m3@44d00000 {
	403	compatible = "ti,am3353-wkup-m3";
	404	reg = <0x44d00000 0x4000 /* M3 UMEM */
	405	0x44d80000 0x2000>; /* M3 DMEM */
	406	ti,hwmods = "wkup_m3";
	407	};
e45879ec	408
15e8246b PA	409	elm: elm@48080000 {
	410	compatible = "ti,am3352-elm";
	411	reg = <0x48080000 0x2000>;
	412	interrupts = <4>;
	413	ti,hwmods = "elm";
	414	status = "disabled";
	415	};
	416
e45879ec PA	417	gpmc: gpmc@50000000 {
	418	compatible = "ti,am3352-gpmc";
	419	ti,hwmods = "gpmc";
	420	reg = <0x50000000 0x2000>;
	421	interrupts = <100>;
00dddcaa LP	422	gpmc,num-cs = <7>;
00dddcaa LP	423	gpmc,num-waitpins = <2>;
e45879ec PA	424	#address-cells = <2>;
	425	#size-cells = <1>;
	426	status = "disabled";
	427	};
5fc0b42a AC	428	};
5fc0b42a AC	429	};