Commit | Line | Data |
---|---|---|
5fc0b42a AC |
1 | /* |
2 | * Device Tree Source for AM33XX SoC | |
3 | * | |
4 | * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ | |
5 | * | |
6 | * This file is licensed under the terms of the GNU General Public License | |
7 | * version 2. This program is licensed "as is" without any warranty of any | |
8 | * kind, whether express or implied. | |
9 | */ | |
10 | ||
e94233c2 | 11 | #include <dt-bindings/gpio/gpio.h> |
6a8a6b65 | 12 | #include <dt-bindings/pinctrl/am33xx.h> |
e94233c2 | 13 | |
eb33ef66 | 14 | #include "skeleton.dtsi" |
5fc0b42a AC |
15 | |
16 | / { | |
17 | compatible = "ti,am33xx"; | |
4c94ac29 | 18 | interrupt-parent = <&intc>; |
5fc0b42a AC |
19 | |
20 | aliases { | |
6a968678 NM |
21 | i2c0 = &i2c0; |
22 | i2c1 = &i2c1; | |
23 | i2c2 = &i2c2; | |
dde3b0d6 VH |
24 | serial0 = &uart0; |
25 | serial1 = &uart1; | |
26 | serial2 = &uart2; | |
27 | serial3 = &uart3; | |
28 | serial4 = &uart4; | |
29 | serial5 = &uart5; | |
7a57ee87 AC |
30 | d_can0 = &dcan0; |
31 | d_can1 = &dcan1; | |
97238b35 SAS |
32 | usb0 = &usb0; |
33 | usb1 = &usb1; | |
34 | phy0 = &usb0_phy; | |
35 | phy1 = &usb1_phy; | |
8170056d DM |
36 | ethernet0 = &cpsw_emac0; |
37 | ethernet1 = &cpsw_emac1; | |
5fc0b42a AC |
38 | }; |
39 | ||
40 | cpus { | |
2e0d513f LP |
41 | #address-cells = <1>; |
42 | #size-cells = <0>; | |
5fc0b42a AC |
43 | cpu@0 { |
44 | compatible = "arm,cortex-a8"; | |
2e0d513f LP |
45 | device_type = "cpu"; |
46 | reg = <0>; | |
efeedcf2 AC |
47 | |
48 | /* | |
49 | * To consider voltage drop between PMIC and SoC, | |
50 | * tolerance value is reduced to 2% from 4% and | |
51 | * voltage value is increased as a precaution. | |
52 | */ | |
53 | operating-points = < | |
54 | /* kHz uV */ | |
55 | 720000 1285000 | |
56 | 600000 1225000 | |
57 | 500000 1125000 | |
58 | 275000 1125000 | |
59 | >; | |
60 | voltage-tolerance = <2>; /* 2 percentage */ | |
8d766fa2 NM |
61 | |
62 | clocks = <&dpll_mpu_ck>; | |
63 | clock-names = "cpu"; | |
64 | ||
efeedcf2 | 65 | clock-latency = <300000>; /* From omap-cpufreq driver */ |
5fc0b42a AC |
66 | }; |
67 | }; | |
68 | ||
6797cdbe AB |
69 | pmu { |
70 | compatible = "arm,cortex-a8-pmu"; | |
71 | interrupts = <3>; | |
72 | }; | |
73 | ||
5fc0b42a | 74 | /* |
5c5be9db | 75 | * The soc node represents the soc top level view. It is used for IPs |
5fc0b42a AC |
76 | * that are not memory mapped in the MPU view or for the MPU itself. |
77 | */ | |
78 | soc { | |
79 | compatible = "ti,omap-infra"; | |
80 | mpu { | |
81 | compatible = "ti,omap3-mpu"; | |
82 | ti,hwmods = "mpu"; | |
83 | }; | |
84 | }; | |
85 | ||
86 | /* | |
87 | * XXX: Use a flat representation of the AM33XX interconnect. | |
b7ab524b GU |
88 | * The real AM33XX interconnect network is quite complex. Since |
89 | * it will not bring real advantage to represent that in DT | |
5fc0b42a AC |
90 | * for the moment, just use a fake OCP bus entry to represent |
91 | * the whole bus hierarchy. | |
92 | */ | |
93 | ocp { | |
94 | compatible = "simple-bus"; | |
95 | #address-cells = <1>; | |
96 | #size-cells = <1>; | |
97 | ranges; | |
98 | ti,hwmods = "l3_main"; | |
99 | ||
e3bc5358 TK |
100 | l4_wkup: l4_wkup@44c00000 { |
101 | compatible = "ti,am3-l4-wkup", "simple-bus"; | |
102 | #address-cells = <1>; | |
103 | #size-cells = <1>; | |
104 | ranges = <0 0x44c00000 0x280000>; | |
ea291c98 | 105 | |
d129be27 SA |
106 | wkup_m3: wkup_m3@100000 { |
107 | compatible = "ti,am3352-wkup-m3"; | |
108 | reg = <0x100000 0x4000>, | |
109 | <0x180000 0x2000>; | |
110 | reg-names = "umem", "dmem"; | |
111 | ti,hwmods = "wkup_m3"; | |
112 | ti,pm-firmware = "am335x-pm-firmware.elf"; | |
113 | }; | |
114 | ||
e3bc5358 TK |
115 | prcm: prcm@200000 { |
116 | compatible = "ti,am3-prcm"; | |
117 | reg = <0x200000 0x4000>; | |
ea291c98 | 118 | |
e3bc5358 TK |
119 | prcm_clocks: clocks { |
120 | #address-cells = <1>; | |
121 | #size-cells = <0>; | |
122 | }; | |
ea291c98 | 123 | |
e3bc5358 TK |
124 | prcm_clockdomains: clockdomains { |
125 | }; | |
ea291c98 TK |
126 | }; |
127 | ||
e3bc5358 TK |
128 | scm: scm@210000 { |
129 | compatible = "ti,am3-scm", "simple-bus"; | |
130 | reg = <0x210000 0x2000>; | |
131 | #address-cells = <1>; | |
132 | #size-cells = <1>; | |
133 | ranges = <0 0x210000 0x2000>; | |
134 | ||
135 | am33xx_pinmux: pinmux@800 { | |
136 | compatible = "pinctrl-single"; | |
137 | reg = <0x800 0x238>; | |
138 | #address-cells = <1>; | |
139 | #size-cells = <0>; | |
140 | pinctrl-single,register-width = <32>; | |
141 | pinctrl-single,function-mask = <0x7f>; | |
142 | }; | |
143 | ||
144 | scm_conf: scm_conf@0 { | |
145 | compatible = "syscon"; | |
146 | reg = <0x0 0x800>; | |
147 | #address-cells = <1>; | |
148 | #size-cells = <1>; | |
149 | ||
150 | scm_clocks: clocks { | |
151 | #address-cells = <1>; | |
152 | #size-cells = <0>; | |
153 | }; | |
154 | }; | |
155 | ||
99937129 SA |
156 | wkup_m3_ipc: wkup_m3_ipc@1324 { |
157 | compatible = "ti,am3352-wkup-m3-ipc"; | |
158 | reg = <0x1324 0x24>; | |
159 | interrupts = <78>; | |
160 | ti,rproc = <&wkup_m3>; | |
161 | mboxes = <&mailbox &mbox_wkupm3>; | |
162 | }; | |
163 | ||
e3bc5358 TK |
164 | scm_clockdomains: clockdomains { |
165 | }; | |
ea291c98 TK |
166 | }; |
167 | }; | |
168 | ||
5fc0b42a | 169 | intc: interrupt-controller@48200000 { |
cab82b76 | 170 | compatible = "ti,am33xx-intc"; |
5fc0b42a AC |
171 | interrupt-controller; |
172 | #interrupt-cells = <1>; | |
5fc0b42a AC |
173 | reg = <0x48200000 0x1000>; |
174 | }; | |
175 | ||
505975d3 MP |
176 | edma: edma@49000000 { |
177 | compatible = "ti,edma3"; | |
178 | ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2"; | |
179 | reg = <0x49000000 0x10000>, | |
cf7eb979 | 180 | <0x44e10f90 0x40>; |
505975d3 MP |
181 | interrupts = <12 13 14>; |
182 | #dma-cells = <1>; | |
505975d3 MP |
183 | }; |
184 | ||
b918e2c0 | 185 | gpio0: gpio@44e07000 { |
5fc0b42a AC |
186 | compatible = "ti,omap4-gpio"; |
187 | ti,hwmods = "gpio1"; | |
188 | gpio-controller; | |
189 | #gpio-cells = <2>; | |
190 | interrupt-controller; | |
5eac0eb7 | 191 | #interrupt-cells = <2>; |
4462b31c | 192 | reg = <0x44e07000 0x1000>; |
4462b31c | 193 | interrupts = <96>; |
5fc0b42a AC |
194 | }; |
195 | ||
b918e2c0 | 196 | gpio1: gpio@4804c000 { |
5fc0b42a AC |
197 | compatible = "ti,omap4-gpio"; |
198 | ti,hwmods = "gpio2"; | |
199 | gpio-controller; | |
200 | #gpio-cells = <2>; | |
201 | interrupt-controller; | |
5eac0eb7 | 202 | #interrupt-cells = <2>; |
4462b31c | 203 | reg = <0x4804c000 0x1000>; |
4462b31c | 204 | interrupts = <98>; |
5fc0b42a AC |
205 | }; |
206 | ||
b918e2c0 | 207 | gpio2: gpio@481ac000 { |
5fc0b42a AC |
208 | compatible = "ti,omap4-gpio"; |
209 | ti,hwmods = "gpio3"; | |
210 | gpio-controller; | |
211 | #gpio-cells = <2>; | |
212 | interrupt-controller; | |
5eac0eb7 | 213 | #interrupt-cells = <2>; |
4462b31c | 214 | reg = <0x481ac000 0x1000>; |
4462b31c | 215 | interrupts = <32>; |
5fc0b42a AC |
216 | }; |
217 | ||
b918e2c0 | 218 | gpio3: gpio@481ae000 { |
5fc0b42a AC |
219 | compatible = "ti,omap4-gpio"; |
220 | ti,hwmods = "gpio4"; | |
221 | gpio-controller; | |
222 | #gpio-cells = <2>; | |
223 | interrupt-controller; | |
5eac0eb7 | 224 | #interrupt-cells = <2>; |
4462b31c | 225 | reg = <0x481ae000 0x1000>; |
4462b31c | 226 | interrupts = <62>; |
5fc0b42a AC |
227 | }; |
228 | ||
dde3b0d6 | 229 | uart0: serial@44e09000 { |
4fcdff9b | 230 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
5fc0b42a AC |
231 | ti,hwmods = "uart1"; |
232 | clock-frequency = <48000000>; | |
4462b31c | 233 | reg = <0x44e09000 0x2000>; |
4462b31c | 234 | interrupts = <72>; |
53d91034 | 235 | status = "disabled"; |
13fd3d57 SAS |
236 | dmas = <&edma 26>, <&edma 27>; |
237 | dma-names = "tx", "rx"; | |
5fc0b42a AC |
238 | }; |
239 | ||
dde3b0d6 | 240 | uart1: serial@48022000 { |
4fcdff9b | 241 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
5fc0b42a AC |
242 | ti,hwmods = "uart2"; |
243 | clock-frequency = <48000000>; | |
4462b31c | 244 | reg = <0x48022000 0x2000>; |
4462b31c | 245 | interrupts = <73>; |
53d91034 | 246 | status = "disabled"; |
13fd3d57 SAS |
247 | dmas = <&edma 28>, <&edma 29>; |
248 | dma-names = "tx", "rx"; | |
5fc0b42a AC |
249 | }; |
250 | ||
dde3b0d6 | 251 | uart2: serial@48024000 { |
4fcdff9b | 252 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
5fc0b42a AC |
253 | ti,hwmods = "uart3"; |
254 | clock-frequency = <48000000>; | |
4462b31c | 255 | reg = <0x48024000 0x2000>; |
4462b31c | 256 | interrupts = <74>; |
53d91034 | 257 | status = "disabled"; |
13fd3d57 SAS |
258 | dmas = <&edma 30>, <&edma 31>; |
259 | dma-names = "tx", "rx"; | |
5fc0b42a AC |
260 | }; |
261 | ||
dde3b0d6 | 262 | uart3: serial@481a6000 { |
4fcdff9b | 263 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
5fc0b42a AC |
264 | ti,hwmods = "uart4"; |
265 | clock-frequency = <48000000>; | |
4462b31c | 266 | reg = <0x481a6000 0x2000>; |
4462b31c | 267 | interrupts = <44>; |
53d91034 | 268 | status = "disabled"; |
5fc0b42a AC |
269 | }; |
270 | ||
dde3b0d6 | 271 | uart4: serial@481a8000 { |
4fcdff9b | 272 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
5fc0b42a AC |
273 | ti,hwmods = "uart5"; |
274 | clock-frequency = <48000000>; | |
4462b31c | 275 | reg = <0x481a8000 0x2000>; |
4462b31c | 276 | interrupts = <45>; |
53d91034 | 277 | status = "disabled"; |
5fc0b42a AC |
278 | }; |
279 | ||
dde3b0d6 | 280 | uart5: serial@481aa000 { |
4fcdff9b | 281 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
5fc0b42a AC |
282 | ti,hwmods = "uart6"; |
283 | clock-frequency = <48000000>; | |
4462b31c | 284 | reg = <0x481aa000 0x2000>; |
4462b31c | 285 | interrupts = <46>; |
53d91034 | 286 | status = "disabled"; |
5fc0b42a AC |
287 | }; |
288 | ||
b918e2c0 | 289 | i2c0: i2c@44e0b000 { |
5fc0b42a AC |
290 | compatible = "ti,omap4-i2c"; |
291 | #address-cells = <1>; | |
292 | #size-cells = <0>; | |
293 | ti,hwmods = "i2c1"; | |
4462b31c | 294 | reg = <0x44e0b000 0x1000>; |
4462b31c | 295 | interrupts = <70>; |
53d91034 | 296 | status = "disabled"; |
5fc0b42a AC |
297 | }; |
298 | ||
b918e2c0 | 299 | i2c1: i2c@4802a000 { |
5fc0b42a AC |
300 | compatible = "ti,omap4-i2c"; |
301 | #address-cells = <1>; | |
302 | #size-cells = <0>; | |
303 | ti,hwmods = "i2c2"; | |
4462b31c | 304 | reg = <0x4802a000 0x1000>; |
4462b31c | 305 | interrupts = <71>; |
53d91034 | 306 | status = "disabled"; |
5fc0b42a AC |
307 | }; |
308 | ||
b918e2c0 | 309 | i2c2: i2c@4819c000 { |
5fc0b42a AC |
310 | compatible = "ti,omap4-i2c"; |
311 | #address-cells = <1>; | |
312 | #size-cells = <0>; | |
313 | ti,hwmods = "i2c3"; | |
4462b31c | 314 | reg = <0x4819c000 0x1000>; |
4462b31c | 315 | interrupts = <30>; |
53d91034 | 316 | status = "disabled"; |
5fc0b42a | 317 | }; |
5f789ebc | 318 | |
55b4452b MP |
319 | mmc1: mmc@48060000 { |
320 | compatible = "ti,omap4-hsmmc"; | |
321 | ti,hwmods = "mmc1"; | |
322 | ti,dual-volt; | |
323 | ti,needs-special-reset; | |
324 | ti,needs-special-hs-handling; | |
325 | dmas = <&edma 24 | |
326 | &edma 25>; | |
327 | dma-names = "tx", "rx"; | |
328 | interrupts = <64>; | |
329 | interrupt-parent = <&intc>; | |
330 | reg = <0x48060000 0x1000>; | |
331 | status = "disabled"; | |
332 | }; | |
333 | ||
334 | mmc2: mmc@481d8000 { | |
335 | compatible = "ti,omap4-hsmmc"; | |
336 | ti,hwmods = "mmc2"; | |
337 | ti,needs-special-reset; | |
338 | dmas = <&edma 2 | |
339 | &edma 3>; | |
340 | dma-names = "tx", "rx"; | |
341 | interrupts = <28>; | |
342 | interrupt-parent = <&intc>; | |
343 | reg = <0x481d8000 0x1000>; | |
344 | status = "disabled"; | |
345 | }; | |
346 | ||
347 | mmc3: mmc@47810000 { | |
348 | compatible = "ti,omap4-hsmmc"; | |
349 | ti,hwmods = "mmc3"; | |
350 | ti,needs-special-reset; | |
351 | interrupts = <29>; | |
352 | interrupt-parent = <&intc>; | |
353 | reg = <0x47810000 0x1000>; | |
354 | status = "disabled"; | |
355 | }; | |
356 | ||
d4cbe80d SA |
357 | hwspinlock: spinlock@480ca000 { |
358 | compatible = "ti,omap4-hwspinlock"; | |
359 | reg = <0x480ca000 0x1000>; | |
360 | ti,hwmods = "spinlock"; | |
34054213 | 361 | #hwlock-cells = <1>; |
d4cbe80d SA |
362 | }; |
363 | ||
5f789ebc AM |
364 | wdt2: wdt@44e35000 { |
365 | compatible = "ti,omap3-wdt"; | |
366 | ti,hwmods = "wd_timer2"; | |
4462b31c | 367 | reg = <0x44e35000 0x1000>; |
4462b31c | 368 | interrupts = <91>; |
5f789ebc | 369 | }; |
059b185d | 370 | |
e23aabc6 RQ |
371 | dcan0: can@481cc000 { |
372 | compatible = "ti,am3352-d_can"; | |
059b185d | 373 | ti,hwmods = "d_can0"; |
e23aabc6 RQ |
374 | reg = <0x481cc000 0x2000>; |
375 | clocks = <&dcan0_fck>; | |
376 | clock-names = "fck"; | |
e3bc5358 | 377 | syscon-raminit = <&scm_conf 0x644 0>; |
059b185d | 378 | interrupts = <52>; |
059b185d AC |
379 | status = "disabled"; |
380 | }; | |
381 | ||
e23aabc6 RQ |
382 | dcan1: can@481d0000 { |
383 | compatible = "ti,am3352-d_can"; | |
059b185d | 384 | ti,hwmods = "d_can1"; |
e23aabc6 RQ |
385 | reg = <0x481d0000 0x2000>; |
386 | clocks = <&dcan1_fck>; | |
387 | clock-names = "fck"; | |
e3bc5358 | 388 | syscon-raminit = <&scm_conf 0x644 1>; |
059b185d | 389 | interrupts = <55>; |
059b185d AC |
390 | status = "disabled"; |
391 | }; | |
fab8ad0b | 392 | |
40242301 SA |
393 | mailbox: mailbox@480C8000 { |
394 | compatible = "ti,omap4-mailbox"; | |
395 | reg = <0x480C8000 0x200>; | |
396 | interrupts = <77>; | |
397 | ti,hwmods = "mailbox"; | |
24df0453 | 398 | #mbox-cells = <1>; |
40242301 SA |
399 | ti,mbox-num-users = <4>; |
400 | ti,mbox-num-fifos = <8>; | |
d27704d1 SA |
401 | mbox_wkupm3: wkup_m3 { |
402 | ti,mbox-tx = <0 0 0>; | |
403 | ti,mbox-rx = <0 0 3>; | |
404 | }; | |
40242301 SA |
405 | }; |
406 | ||
fab8ad0b | 407 | timer1: timer@44e31000 { |
002e1ec5 | 408 | compatible = "ti,am335x-timer-1ms"; |
fab8ad0b JH |
409 | reg = <0x44e31000 0x400>; |
410 | interrupts = <67>; | |
411 | ti,hwmods = "timer1"; | |
412 | ti,timer-alwon; | |
413 | }; | |
414 | ||
415 | timer2: timer@48040000 { | |
002e1ec5 | 416 | compatible = "ti,am335x-timer"; |
fab8ad0b JH |
417 | reg = <0x48040000 0x400>; |
418 | interrupts = <68>; | |
419 | ti,hwmods = "timer2"; | |
420 | }; | |
421 | ||
422 | timer3: timer@48042000 { | |
002e1ec5 | 423 | compatible = "ti,am335x-timer"; |
fab8ad0b JH |
424 | reg = <0x48042000 0x400>; |
425 | interrupts = <69>; | |
426 | ti,hwmods = "timer3"; | |
427 | }; | |
428 | ||
429 | timer4: timer@48044000 { | |
002e1ec5 | 430 | compatible = "ti,am335x-timer"; |
fab8ad0b JH |
431 | reg = <0x48044000 0x400>; |
432 | interrupts = <92>; | |
433 | ti,hwmods = "timer4"; | |
434 | ti,timer-pwm; | |
435 | }; | |
436 | ||
437 | timer5: timer@48046000 { | |
002e1ec5 | 438 | compatible = "ti,am335x-timer"; |
fab8ad0b JH |
439 | reg = <0x48046000 0x400>; |
440 | interrupts = <93>; | |
441 | ti,hwmods = "timer5"; | |
442 | ti,timer-pwm; | |
443 | }; | |
444 | ||
445 | timer6: timer@48048000 { | |
002e1ec5 | 446 | compatible = "ti,am335x-timer"; |
fab8ad0b JH |
447 | reg = <0x48048000 0x400>; |
448 | interrupts = <94>; | |
449 | ti,hwmods = "timer6"; | |
450 | ti,timer-pwm; | |
451 | }; | |
452 | ||
453 | timer7: timer@4804a000 { | |
002e1ec5 | 454 | compatible = "ti,am335x-timer"; |
fab8ad0b JH |
455 | reg = <0x4804a000 0x400>; |
456 | interrupts = <95>; | |
457 | ti,hwmods = "timer7"; | |
458 | ti,timer-pwm; | |
459 | }; | |
0d935c16 | 460 | |
ccd8b9e0 | 461 | rtc: rtc@44e3e000 { |
6ac7b4a2 | 462 | compatible = "ti,am3352-rtc", "ti,da830-rtc"; |
0d935c16 AM |
463 | reg = <0x44e3e000 0x1000>; |
464 | interrupts = <75 | |
465 | 76>; | |
466 | ti,hwmods = "rtc"; | |
467 | }; | |
9fd3c748 PA |
468 | |
469 | spi0: spi@48030000 { | |
470 | compatible = "ti,omap4-mcspi"; | |
471 | #address-cells = <1>; | |
472 | #size-cells = <0>; | |
473 | reg = <0x48030000 0x400>; | |
7b3754c6 | 474 | interrupts = <65>; |
9fd3c748 PA |
475 | ti,spi-num-cs = <2>; |
476 | ti,hwmods = "spi0"; | |
f5e2f807 MP |
477 | dmas = <&edma 16 |
478 | &edma 17 | |
479 | &edma 18 | |
480 | &edma 19>; | |
481 | dma-names = "tx0", "rx0", "tx1", "rx1"; | |
9fd3c748 PA |
482 | status = "disabled"; |
483 | }; | |
484 | ||
485 | spi1: spi@481a0000 { | |
486 | compatible = "ti,omap4-mcspi"; | |
487 | #address-cells = <1>; | |
488 | #size-cells = <0>; | |
489 | reg = <0x481a0000 0x400>; | |
7b3754c6 | 490 | interrupts = <125>; |
9fd3c748 PA |
491 | ti,spi-num-cs = <2>; |
492 | ti,hwmods = "spi1"; | |
f5e2f807 MP |
493 | dmas = <&edma 42 |
494 | &edma 43 | |
495 | &edma 44 | |
496 | &edma 45>; | |
497 | dma-names = "tx0", "rx0", "tx1", "rx1"; | |
9fd3c748 PA |
498 | status = "disabled"; |
499 | }; | |
35b47fbb | 500 | |
97238b35 SAS |
501 | usb: usb@47400000 { |
502 | compatible = "ti,am33xx-usb"; | |
503 | reg = <0x47400000 0x1000>; | |
504 | ranges; | |
505 | #address-cells = <1>; | |
506 | #size-cells = <1>; | |
35b47fbb | 507 | ti,hwmods = "usb_otg_hs"; |
97238b35 SAS |
508 | status = "disabled"; |
509 | ||
8abcdd68 | 510 | usb_ctrl_mod: control@44e10620 { |
97238b35 SAS |
511 | compatible = "ti,am335x-usb-ctrl-module"; |
512 | reg = <0x44e10620 0x10 | |
513 | 0x44e10648 0x4>; | |
514 | reg-names = "phy_ctrl", "wakeup"; | |
515 | status = "disabled"; | |
516 | }; | |
517 | ||
c031a7d4 | 518 | usb0_phy: usb-phy@47401300 { |
97238b35 SAS |
519 | compatible = "ti,am335x-usb-phy"; |
520 | reg = <0x47401300 0x100>; | |
521 | reg-names = "phy"; | |
522 | status = "disabled"; | |
e7243b76 | 523 | ti,ctrl_mod = <&usb_ctrl_mod>; |
97238b35 SAS |
524 | }; |
525 | ||
526 | usb0: usb@47401000 { | |
527 | compatible = "ti,musb-am33xx"; | |
97238b35 | 528 | status = "disabled"; |
c031a7d4 SAS |
529 | reg = <0x47401400 0x400 |
530 | 0x47401000 0x200>; | |
531 | reg-names = "mc", "control"; | |
532 | ||
533 | interrupts = <18>; | |
534 | interrupt-names = "mc"; | |
535 | dr_mode = "otg"; | |
536 | mentor,multipoint = <1>; | |
537 | mentor,num-eps = <16>; | |
538 | mentor,ram-bits = <12>; | |
539 | mentor,power = <500>; | |
540 | phys = <&usb0_phy>; | |
9b3452d1 SAS |
541 | |
542 | dmas = <&cppi41dma 0 0 &cppi41dma 1 0 | |
543 | &cppi41dma 2 0 &cppi41dma 3 0 | |
544 | &cppi41dma 4 0 &cppi41dma 5 0 | |
545 | &cppi41dma 6 0 &cppi41dma 7 0 | |
546 | &cppi41dma 8 0 &cppi41dma 9 0 | |
547 | &cppi41dma 10 0 &cppi41dma 11 0 | |
548 | &cppi41dma 12 0 &cppi41dma 13 0 | |
549 | &cppi41dma 14 0 &cppi41dma 0 1 | |
550 | &cppi41dma 1 1 &cppi41dma 2 1 | |
551 | &cppi41dma 3 1 &cppi41dma 4 1 | |
552 | &cppi41dma 5 1 &cppi41dma 6 1 | |
553 | &cppi41dma 7 1 &cppi41dma 8 1 | |
554 | &cppi41dma 9 1 &cppi41dma 10 1 | |
555 | &cppi41dma 11 1 &cppi41dma 12 1 | |
556 | &cppi41dma 13 1 &cppi41dma 14 1>; | |
557 | dma-names = | |
558 | "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", | |
559 | "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", | |
560 | "rx14", "rx15", | |
561 | "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", | |
562 | "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", | |
563 | "tx14", "tx15"; | |
97238b35 SAS |
564 | }; |
565 | ||
c031a7d4 | 566 | usb1_phy: usb-phy@47401b00 { |
97238b35 SAS |
567 | compatible = "ti,am335x-usb-phy"; |
568 | reg = <0x47401b00 0x100>; | |
569 | reg-names = "phy"; | |
570 | status = "disabled"; | |
e7243b76 | 571 | ti,ctrl_mod = <&usb_ctrl_mod>; |
97238b35 SAS |
572 | }; |
573 | ||
574 | usb1: usb@47401800 { | |
575 | compatible = "ti,musb-am33xx"; | |
97238b35 | 576 | status = "disabled"; |
c031a7d4 SAS |
577 | reg = <0x47401c00 0x400 |
578 | 0x47401800 0x200>; | |
579 | reg-names = "mc", "control"; | |
580 | interrupts = <19>; | |
581 | interrupt-names = "mc"; | |
582 | dr_mode = "otg"; | |
583 | mentor,multipoint = <1>; | |
584 | mentor,num-eps = <16>; | |
585 | mentor,ram-bits = <12>; | |
586 | mentor,power = <500>; | |
587 | phys = <&usb1_phy>; | |
9b3452d1 SAS |
588 | |
589 | dmas = <&cppi41dma 15 0 &cppi41dma 16 0 | |
590 | &cppi41dma 17 0 &cppi41dma 18 0 | |
591 | &cppi41dma 19 0 &cppi41dma 20 0 | |
592 | &cppi41dma 21 0 &cppi41dma 22 0 | |
593 | &cppi41dma 23 0 &cppi41dma 24 0 | |
594 | &cppi41dma 25 0 &cppi41dma 26 0 | |
595 | &cppi41dma 27 0 &cppi41dma 28 0 | |
596 | &cppi41dma 29 0 &cppi41dma 15 1 | |
597 | &cppi41dma 16 1 &cppi41dma 17 1 | |
598 | &cppi41dma 18 1 &cppi41dma 19 1 | |
599 | &cppi41dma 20 1 &cppi41dma 21 1 | |
600 | &cppi41dma 22 1 &cppi41dma 23 1 | |
601 | &cppi41dma 24 1 &cppi41dma 25 1 | |
602 | &cppi41dma 26 1 &cppi41dma 27 1 | |
603 | &cppi41dma 28 1 &cppi41dma 29 1>; | |
604 | dma-names = | |
605 | "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", | |
606 | "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", | |
607 | "rx14", "rx15", | |
608 | "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", | |
609 | "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", | |
610 | "tx14", "tx15"; | |
97238b35 | 611 | }; |
9b3452d1 | 612 | |
8abcdd68 | 613 | cppi41dma: dma-controller@47402000 { |
9b3452d1 SAS |
614 | compatible = "ti,am3359-cppi41"; |
615 | reg = <0x47400000 0x1000 | |
616 | 0x47402000 0x1000 | |
617 | 0x47403000 0x1000 | |
618 | 0x47404000 0x4000>; | |
3b6394b4 | 619 | reg-names = "glue", "controller", "scheduler", "queuemgr"; |
9b3452d1 SAS |
620 | interrupts = <17>; |
621 | interrupt-names = "glue"; | |
622 | #dma-cells = <2>; | |
623 | #dma-channels = <30>; | |
624 | #dma-requests = <256>; | |
625 | status = "disabled"; | |
626 | }; | |
35b47fbb | 627 | }; |
6be35c70 | 628 | |
0a7486c9 PA |
629 | epwmss0: epwmss@48300000 { |
630 | compatible = "ti,am33xx-pwmss"; | |
631 | reg = <0x48300000 0x10>; | |
632 | ti,hwmods = "epwmss0"; | |
633 | #address-cells = <1>; | |
634 | #size-cells = <1>; | |
635 | status = "disabled"; | |
636 | ranges = <0x48300100 0x48300100 0x80 /* ECAP */ | |
637 | 0x48300180 0x48300180 0x80 /* EQEP */ | |
638 | 0x48300200 0x48300200 0x80>; /* EHRPWM */ | |
639 | ||
640 | ecap0: ecap@48300100 { | |
641 | compatible = "ti,am33xx-ecap"; | |
642 | #pwm-cells = <3>; | |
643 | reg = <0x48300100 0x80>; | |
e8c85a3e MP |
644 | interrupts = <31>; |
645 | interrupt-names = "ecap0"; | |
0a7486c9 PA |
646 | ti,hwmods = "ecap0"; |
647 | status = "disabled"; | |
648 | }; | |
649 | ||
650 | ehrpwm0: ehrpwm@48300200 { | |
651 | compatible = "ti,am33xx-ehrpwm"; | |
652 | #pwm-cells = <3>; | |
653 | reg = <0x48300200 0x80>; | |
654 | ti,hwmods = "ehrpwm0"; | |
655 | status = "disabled"; | |
656 | }; | |
657 | }; | |
658 | ||
659 | epwmss1: epwmss@48302000 { | |
660 | compatible = "ti,am33xx-pwmss"; | |
661 | reg = <0x48302000 0x10>; | |
662 | ti,hwmods = "epwmss1"; | |
663 | #address-cells = <1>; | |
664 | #size-cells = <1>; | |
665 | status = "disabled"; | |
666 | ranges = <0x48302100 0x48302100 0x80 /* ECAP */ | |
667 | 0x48302180 0x48302180 0x80 /* EQEP */ | |
668 | 0x48302200 0x48302200 0x80>; /* EHRPWM */ | |
669 | ||
670 | ecap1: ecap@48302100 { | |
671 | compatible = "ti,am33xx-ecap"; | |
672 | #pwm-cells = <3>; | |
673 | reg = <0x48302100 0x80>; | |
e8c85a3e MP |
674 | interrupts = <47>; |
675 | interrupt-names = "ecap1"; | |
0a7486c9 PA |
676 | ti,hwmods = "ecap1"; |
677 | status = "disabled"; | |
678 | }; | |
679 | ||
680 | ehrpwm1: ehrpwm@48302200 { | |
681 | compatible = "ti,am33xx-ehrpwm"; | |
682 | #pwm-cells = <3>; | |
683 | reg = <0x48302200 0x80>; | |
684 | ti,hwmods = "ehrpwm1"; | |
685 | status = "disabled"; | |
686 | }; | |
687 | }; | |
688 | ||
689 | epwmss2: epwmss@48304000 { | |
690 | compatible = "ti,am33xx-pwmss"; | |
691 | reg = <0x48304000 0x10>; | |
692 | ti,hwmods = "epwmss2"; | |
693 | #address-cells = <1>; | |
694 | #size-cells = <1>; | |
695 | status = "disabled"; | |
696 | ranges = <0x48304100 0x48304100 0x80 /* ECAP */ | |
697 | 0x48304180 0x48304180 0x80 /* EQEP */ | |
698 | 0x48304200 0x48304200 0x80>; /* EHRPWM */ | |
699 | ||
700 | ecap2: ecap@48304100 { | |
701 | compatible = "ti,am33xx-ecap"; | |
702 | #pwm-cells = <3>; | |
703 | reg = <0x48304100 0x80>; | |
e8c85a3e MP |
704 | interrupts = <61>; |
705 | interrupt-names = "ecap2"; | |
0a7486c9 PA |
706 | ti,hwmods = "ecap2"; |
707 | status = "disabled"; | |
708 | }; | |
709 | ||
710 | ehrpwm2: ehrpwm@48304200 { | |
711 | compatible = "ti,am33xx-ehrpwm"; | |
712 | #pwm-cells = <3>; | |
713 | reg = <0x48304200 0x80>; | |
714 | ti,hwmods = "ehrpwm2"; | |
715 | status = "disabled"; | |
716 | }; | |
717 | }; | |
718 | ||
1a39a65c | 719 | mac: ethernet@4a100000 { |
21696f71 | 720 | compatible = "ti,am335x-cpsw","ti,cpsw"; |
1a39a65c | 721 | ti,hwmods = "cpgmac0"; |
0987a6ef GC |
722 | clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>; |
723 | clock-names = "fck", "cpts"; | |
1a39a65c M |
724 | cpdma_channels = <8>; |
725 | ale_entries = <1024>; | |
726 | bd_ram_size = <0x2000>; | |
727 | no_bd_ram = <0>; | |
728 | rx_descs = <64>; | |
729 | mac_control = <0x20>; | |
730 | slaves = <2>; | |
e86ac13b | 731 | active_slave = <0>; |
1a39a65c M |
732 | cpts_clock_mult = <0x80000000>; |
733 | cpts_clock_shift = <29>; | |
734 | reg = <0x4a100000 0x800 | |
735 | 0x4a101200 0x100>; | |
736 | #address-cells = <1>; | |
737 | #size-cells = <1>; | |
738 | interrupt-parent = <&intc>; | |
739 | /* | |
740 | * c0_rx_thresh_pend | |
741 | * c0_rx_pend | |
742 | * c0_tx_pend | |
743 | * c0_misc_pend | |
744 | */ | |
745 | interrupts = <40 41 42 43>; | |
746 | ranges; | |
e3bc5358 | 747 | syscon = <&scm_conf>; |
16c75a13 | 748 | status = "disabled"; |
1a39a65c M |
749 | |
750 | davinci_mdio: mdio@4a101000 { | |
751 | compatible = "ti,davinci_mdio"; | |
752 | #address-cells = <1>; | |
753 | #size-cells = <0>; | |
754 | ti,hwmods = "davinci_mdio"; | |
755 | bus_freq = <1000000>; | |
756 | reg = <0x4a101000 0x100>; | |
16c75a13 | 757 | status = "disabled"; |
1a39a65c M |
758 | }; |
759 | ||
760 | cpsw_emac0: slave@4a100200 { | |
761 | /* Filled in by U-Boot */ | |
762 | mac-address = [ 00 00 00 00 00 00 ]; | |
763 | }; | |
764 | ||
765 | cpsw_emac1: slave@4a100300 { | |
766 | /* Filled in by U-Boot */ | |
767 | mac-address = [ 00 00 00 00 00 00 ]; | |
768 | }; | |
39ffbd91 M |
769 | |
770 | phy_sel: cpsw-phy-sel@44e10650 { | |
771 | compatible = "ti,am3352-cpsw-phy-sel"; | |
772 | reg= <0x44e10650 0x4>; | |
773 | reg-names = "gmii-sel"; | |
774 | }; | |
1a39a65c | 775 | }; |
f6575c90 VB |
776 | |
777 | ocmcram: ocmcram@40300000 { | |
8b9a2810 RN |
778 | compatible = "mmio-sram"; |
779 | reg = <0x40300000 0x10000>; /* 64k */ | |
f6575c90 VB |
780 | }; |
781 | ||
15e8246b PA |
782 | elm: elm@48080000 { |
783 | compatible = "ti,am3352-elm"; | |
784 | reg = <0x48080000 0x2000>; | |
785 | interrupts = <4>; | |
786 | ti,hwmods = "elm"; | |
d6cfc1e2 BP |
787 | status = "disabled"; |
788 | }; | |
789 | ||
790 | lcdc: lcdc@4830e000 { | |
791 | compatible = "ti,am33xx-tilcdc"; | |
792 | reg = <0x4830e000 0x1000>; | |
793 | interrupt-parent = <&intc>; | |
794 | interrupts = <36>; | |
795 | ti,hwmods = "lcdc"; | |
15e8246b PA |
796 | status = "disabled"; |
797 | }; | |
798 | ||
a82279dd PR |
799 | tscadc: tscadc@44e0d000 { |
800 | compatible = "ti,am3359-tscadc"; | |
801 | reg = <0x44e0d000 0x1000>; | |
802 | interrupt-parent = <&intc>; | |
803 | interrupts = <16>; | |
804 | ti,hwmods = "adc_tsc"; | |
805 | status = "disabled"; | |
806 | ||
807 | tsc { | |
808 | compatible = "ti,am3359-tsc"; | |
809 | }; | |
810 | am335x_adc: adc { | |
811 | #io-channel-cells = <1>; | |
812 | compatible = "ti,am3359-adc"; | |
813 | }; | |
a82279dd PR |
814 | }; |
815 | ||
e45879ec PA |
816 | gpmc: gpmc@50000000 { |
817 | compatible = "ti,am3352-gpmc"; | |
818 | ti,hwmods = "gpmc"; | |
f12ecbe2 | 819 | ti,no-idle-on-init; |
e45879ec PA |
820 | reg = <0x50000000 0x2000>; |
821 | interrupts = <100>; | |
00dddcaa LP |
822 | gpmc,num-cs = <7>; |
823 | gpmc,num-waitpins = <2>; | |
e45879ec PA |
824 | #address-cells = <2>; |
825 | #size-cells = <1>; | |
826 | status = "disabled"; | |
827 | }; | |
f8302e1e MG |
828 | |
829 | sham: sham@53100000 { | |
830 | compatible = "ti,omap4-sham"; | |
831 | ti,hwmods = "sham"; | |
832 | reg = <0x53100000 0x200>; | |
833 | interrupts = <109>; | |
834 | dmas = <&edma 36>; | |
835 | dma-names = "rx"; | |
836 | }; | |
99919e5e MG |
837 | |
838 | aes: aes@53500000 { | |
839 | compatible = "ti,omap4-aes"; | |
840 | ti,hwmods = "aes"; | |
841 | reg = <0x53500000 0xa0>; | |
7af8884a | 842 | interrupts = <103>; |
99919e5e MG |
843 | dmas = <&edma 6>, |
844 | <&edma 5>; | |
845 | dma-names = "tx", "rx"; | |
846 | }; | |
3f72f875 PA |
847 | |
848 | mcasp0: mcasp@48038000 { | |
849 | compatible = "ti,am33xx-mcasp-audio"; | |
850 | ti,hwmods = "mcasp0"; | |
0bee55ab JS |
851 | reg = <0x48038000 0x2000>, |
852 | <0x46000000 0x400000>; | |
853 | reg-names = "mpu", "dat"; | |
3f72f875 | 854 | interrupts = <80>, <81>; |
ae107d06 | 855 | interrupt-names = "tx", "rx"; |
3f72f875 PA |
856 | status = "disabled"; |
857 | dmas = <&edma 8>, | |
858 | <&edma 9>; | |
859 | dma-names = "tx", "rx"; | |
860 | }; | |
861 | ||
862 | mcasp1: mcasp@4803C000 { | |
863 | compatible = "ti,am33xx-mcasp-audio"; | |
864 | ti,hwmods = "mcasp1"; | |
0bee55ab JS |
865 | reg = <0x4803C000 0x2000>, |
866 | <0x46400000 0x400000>; | |
867 | reg-names = "mpu", "dat"; | |
3f72f875 | 868 | interrupts = <82>, <83>; |
ae107d06 | 869 | interrupt-names = "tx", "rx"; |
3f72f875 PA |
870 | status = "disabled"; |
871 | dmas = <&edma 10>, | |
872 | <&edma 11>; | |
873 | dma-names = "tx", "rx"; | |
874 | }; | |
ed845d6b LV |
875 | |
876 | rng: rng@48310000 { | |
877 | compatible = "ti,omap4-rng"; | |
878 | ti,hwmods = "rng"; | |
879 | reg = <0x48310000 0x2000>; | |
880 | interrupts = <111>; | |
881 | }; | |
5fc0b42a AC |
882 | }; |
883 | }; | |
ea291c98 TK |
884 | |
885 | /include/ "am33xx-clocks.dtsi" |