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cfdbc2e1 VG |
1 | # |
2 | # Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) | |
3 | # | |
4 | # This program is free software; you can redistribute it and/or modify | |
5 | # it under the terms of the GNU General Public License version 2 as | |
6 | # published by the Free Software Foundation. | |
7 | # | |
8 | ||
9 | config ARC | |
10 | def_bool y | |
11 | select ARCH_NO_VIRT_TO_BUS | |
4adeefe1 | 12 | select CLONE_BACKWARDS |
cfdbc2e1 VG |
13 | # ARC Busybox based initramfs absolutely relies on DEVTMPFS for /dev |
14 | select DEVTMPFS if !INITRAMFS_SOURCE="" | |
15 | select GENERIC_ATOMIC64 | |
16 | select GENERIC_CLOCKEVENTS | |
17 | select GENERIC_FIND_FIRST_BIT | |
18 | # for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP | |
19 | select GENERIC_IRQ_SHOW | |
bf90e1ea VG |
20 | select GENERIC_KERNEL_EXECVE |
21 | select GENERIC_KERNEL_THREAD | |
cfdbc2e1 | 22 | select GENERIC_PENDING_IRQ if SMP |
c3581039 | 23 | select GENERIC_SIGALTSTACK |
cfdbc2e1 | 24 | select GENERIC_SMP_IDLE_THREAD |
f46121bd | 25 | select HAVE_ARCH_KGDB |
547f1125 | 26 | select HAVE_ARCH_TRACEHOOK |
cfdbc2e1 | 27 | select HAVE_GENERIC_HARDIRQS |
9c57564e | 28 | select HAVE_IRQ_WORK |
4d86dfbb VG |
29 | select HAVE_KPROBES |
30 | select HAVE_KRETPROBES | |
c121c506 | 31 | select HAVE_MEMBLOCK |
854a0d95 | 32 | select HAVE_MOD_ARCH_SPECIFIC if ARC_DW2_UNWIND |
769bc1fd | 33 | select HAVE_OPROFILE |
9c57564e | 34 | select HAVE_PERF_EVENTS |
999159a5 | 35 | select IRQ_DOMAIN |
cfdbc2e1 | 36 | select MODULES_USE_ELF_RELA |
c121c506 | 37 | select NO_BOOTMEM |
999159a5 VG |
38 | select OF |
39 | select OF_EARLY_FLATTREE | |
9c57564e | 40 | select PERF_USE_VMALLOC |
cfdbc2e1 VG |
41 | |
42 | config SCHED_OMIT_FRAME_POINTER | |
43 | def_bool y | |
44 | ||
45 | config GENERIC_CSUM | |
46 | def_bool y | |
47 | ||
48 | config RWSEM_GENERIC_SPINLOCK | |
49 | def_bool y | |
50 | ||
51 | config ARCH_FLATMEM_ENABLE | |
52 | def_bool y | |
53 | ||
54 | config MMU | |
55 | def_bool y | |
56 | ||
57 | config NO_IOPORT | |
58 | def_bool y | |
59 | ||
60 | config GENERIC_CALIBRATE_DELAY | |
61 | def_bool y | |
62 | ||
63 | config GENERIC_HWEIGHT | |
64 | def_bool y | |
65 | ||
66 | config BINFMT_ELF | |
67 | def_bool y | |
68 | ||
44c8bb91 VG |
69 | config STACKTRACE_SUPPORT |
70 | def_bool y | |
71 | select STACKTRACE | |
72 | ||
cfdbc2e1 VG |
73 | config HAVE_LATENCYTOP_SUPPORT |
74 | def_bool y | |
75 | ||
76 | config NO_DMA | |
77 | def_bool n | |
78 | ||
79 | source "init/Kconfig" | |
80 | source "kernel/Kconfig.freezer" | |
81 | ||
82 | menu "ARC Architecture Configuration" | |
83 | ||
84 | choice | |
85 | prompt "ARC Platform" | |
86 | default ARC_PLAT_FPGA_LEGACY | |
87 | ||
88 | config ARC_PLAT_FPGA_LEGACY | |
89 | bool "\"Legacy\" ARC FPGA dev platform" | |
90 | help | |
91 | Support for ARC development platforms, provided by Synopsys. | |
92 | These are based on FPGA or ISS. e.g. | |
93 | - ARCAngel4 | |
94 | - ML509 | |
95 | - MetaWare ISS | |
96 | ||
97 | #New platform adds here | |
98 | endchoice | |
99 | ||
100 | menu "ARC CPU Configuration" | |
101 | ||
102 | choice | |
103 | prompt "ARC Core" | |
104 | default ARC_CPU_770 | |
105 | ||
106 | config ARC_CPU_750D | |
107 | bool "ARC750D" | |
108 | help | |
109 | Support for ARC750 core | |
110 | ||
111 | config ARC_CPU_770 | |
112 | bool "ARC770" | |
113 | select ARC_CPU_REL_4_10 | |
114 | help | |
115 | Support for ARC770 core introduced with Rel 4.10 (Summer 2011) | |
116 | This core has a bunch of cool new features: | |
117 | -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4) | |
118 | Shared Address Spaces (for sharing TLB entires in MMU) | |
119 | -Caches: New Prog Model, Region Flush | |
120 | -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr | |
121 | ||
122 | endchoice | |
123 | ||
124 | config CPU_BIG_ENDIAN | |
125 | bool "Enable Big Endian Mode" | |
126 | default n | |
127 | help | |
128 | Build kernel for Big Endian Mode of ARC CPU | |
129 | ||
41195d23 VG |
130 | config SMP |
131 | bool "Symmetric Multi-Processing (Incomplete)" | |
132 | default n | |
133 | select USE_GENERIC_SMP_HELPERS | |
134 | help | |
135 | This enables support for systems with more than one CPU. If you have | |
136 | a system with only one CPU, like most personal computers, say N. If | |
137 | you have a system with more than one CPU, say Y. | |
138 | ||
139 | if SMP | |
140 | ||
141 | config ARC_HAS_COH_CACHES | |
142 | def_bool n | |
143 | ||
144 | config ARC_HAS_COH_LLSC | |
145 | def_bool n | |
146 | ||
147 | config ARC_HAS_COH_RTSC | |
148 | def_bool n | |
149 | ||
150 | config ARC_HAS_REENTRANT_IRQ_LV2 | |
151 | def_bool n | |
152 | ||
153 | endif | |
154 | ||
155 | config NR_CPUS | |
156 | int "Maximum number of CPUs (2-32)" | |
157 | range 2 32 | |
158 | depends on SMP | |
159 | default "2" | |
160 | ||
cfdbc2e1 VG |
161 | menuconfig ARC_CACHE |
162 | bool "Enable Cache Support" | |
163 | default y | |
41195d23 VG |
164 | # if SMP, cache enabled ONLY if ARC implementation has cache coherency |
165 | depends on !SMP || ARC_HAS_COH_CACHES | |
cfdbc2e1 VG |
166 | |
167 | if ARC_CACHE | |
168 | ||
169 | config ARC_CACHE_LINE_SHIFT | |
170 | int "Cache Line Length (as power of 2)" | |
171 | range 5 7 | |
172 | default "6" | |
173 | help | |
174 | Starting with ARC700 4.9, Cache line length is configurable, | |
175 | This option specifies "N", with Line-len = 2 power N | |
176 | So line lengths of 32, 64, 128 are specified by 5,6,7, respectively | |
177 | Linux only supports same line lengths for I and D caches. | |
178 | ||
179 | config ARC_HAS_ICACHE | |
180 | bool "Use Instruction Cache" | |
181 | default y | |
182 | ||
183 | config ARC_HAS_DCACHE | |
184 | bool "Use Data Cache" | |
185 | default y | |
186 | ||
187 | config ARC_CACHE_PAGES | |
188 | bool "Per Page Cache Control" | |
189 | default y | |
190 | depends on ARC_HAS_ICACHE || ARC_HAS_DCACHE | |
191 | help | |
192 | This can be used to over-ride the global I/D Cache Enable on a | |
193 | per-page basis (but only for pages accessed via MMU such as | |
194 | Kernel Virtual address or User Virtual Address) | |
195 | TLB entries have a per-page Cache Enable Bit. | |
196 | Note that Global I/D ENABLE + Per Page DISABLE works but corollary | |
197 | Global DISABLE + Per Page ENABLE won't work | |
198 | ||
199 | endif #ARC_CACHE | |
200 | ||
201 | config ARC_HAS_HW_MPY | |
202 | bool "Use Hardware Multiplier (Normal or Faster XMAC)" | |
203 | default y | |
204 | help | |
205 | Influences how gcc generates code for MPY operations. | |
206 | If enabled, MPYxx insns are generated, provided by Standard/XMAC | |
207 | Multipler. Otherwise software multipy lib is used | |
208 | ||
209 | choice | |
210 | prompt "ARC700 MMU Version" | |
211 | default ARC_MMU_V3 if ARC_CPU_770 | |
212 | default ARC_MMU_V2 if ARC_CPU_750D | |
213 | ||
214 | config ARC_MMU_V1 | |
215 | bool "MMU v1" | |
216 | help | |
217 | Orig ARC700 MMU | |
218 | ||
219 | config ARC_MMU_V2 | |
220 | bool "MMU v2" | |
221 | help | |
222 | Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio | |
223 | when 2 D-TLB and 1 I-TLB entries index into same 2way set. | |
224 | ||
225 | config ARC_MMU_V3 | |
226 | bool "MMU v3" | |
227 | depends on ARC_CPU_770 | |
228 | help | |
229 | Introduced with ARC700 4.10: New Features | |
230 | Variable Page size (1k-16k), var JTLB size 128 x (2 or 4) | |
231 | Shared Address Spaces (SASID) | |
232 | ||
233 | endchoice | |
234 | ||
235 | ||
236 | choice | |
237 | prompt "MMU Page Size" | |
238 | default ARC_PAGE_SIZE_8K | |
239 | ||
240 | config ARC_PAGE_SIZE_8K | |
241 | bool "8KB" | |
242 | help | |
243 | Choose between 8k vs 16k | |
244 | ||
245 | config ARC_PAGE_SIZE_16K | |
246 | bool "16KB" | |
247 | depends on ARC_MMU_V3 | |
248 | ||
249 | config ARC_PAGE_SIZE_4K | |
250 | bool "4KB" | |
251 | depends on ARC_MMU_V3 | |
252 | ||
253 | endchoice | |
254 | ||
4788a594 VG |
255 | config ARC_COMPACT_IRQ_LEVELS |
256 | bool "ARCompact IRQ Priorities: High(2)/Low(1)" | |
257 | default n | |
258 | # Timer HAS to be high priority, for any other high priority config | |
259 | select ARC_IRQ3_LV2 | |
41195d23 VG |
260 | # if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy |
261 | depends on !SMP || ARC_HAS_REENTRANT_IRQ_LV2 | |
4788a594 VG |
262 | |
263 | if ARC_COMPACT_IRQ_LEVELS | |
264 | ||
265 | config ARC_IRQ3_LV2 | |
266 | bool | |
267 | ||
268 | config ARC_IRQ5_LV2 | |
269 | bool | |
270 | ||
271 | config ARC_IRQ6_LV2 | |
272 | bool | |
273 | ||
274 | endif | |
275 | ||
cfdbc2e1 VG |
276 | config ARC_FPU_SAVE_RESTORE |
277 | bool "Enable FPU state persistence across context switch" | |
278 | default n | |
279 | help | |
280 | Double Precision Floating Point unit had dedictaed regs which | |
281 | need to be saved/restored across context-switch. | |
282 | Note that ARC FPU is overly simplistic, unlike say x86, which has | |
283 | hardware pieces to allow software to conditionally save/restore, | |
284 | based on actual usage of FPU by a task. Thus our implemn does | |
285 | this for all tasks in system. | |
286 | ||
287 | menuconfig ARC_CPU_REL_4_10 | |
288 | bool "Enable support for Rel 4.10 features" | |
289 | default n | |
290 | help | |
291 | -ARC770 (and dependent features) enabled | |
292 | -ARC750 also shares some of the new features with 770 | |
293 | ||
294 | config ARC_HAS_LLSC | |
295 | bool "Insn: LLOCK/SCOND (efficient atomic ops)" | |
296 | default y | |
297 | depends on ARC_CPU_770 | |
298 | # if SMP, enable LLSC ONLY if ARC implementation has coherent atomics | |
299 | depends on !SMP || ARC_HAS_COH_LLSC | |
300 | ||
301 | config ARC_HAS_SWAPE | |
302 | bool "Insn: SWAPE (endian-swap)" | |
303 | default y | |
304 | depends on ARC_CPU_REL_4_10 | |
305 | ||
306 | config ARC_HAS_RTSC | |
307 | bool "Insn: RTSC (64-bit r/o cycle counter)" | |
308 | default y | |
309 | depends on ARC_CPU_REL_4_10 | |
41195d23 VG |
310 | # if SMP, enable RTSC only if counter is coherent across cores |
311 | depends on !SMP || ARC_HAS_COH_RTSC | |
cfdbc2e1 VG |
312 | |
313 | endmenu # "ARC CPU Configuration" | |
314 | ||
315 | menu "Platform Board Configuration" | |
316 | ||
317 | source "arch/arc/plat-arcfpga/Kconfig" | |
318 | ||
319 | #New platform adds here | |
320 | ||
cfdbc2e1 VG |
321 | config LINUX_LINK_BASE |
322 | hex "Linux Link Address" | |
323 | default "0x80000000" | |
324 | help | |
325 | ARC700 divides the 32 bit phy address space into two equal halves | |
326 | -Lower 2G (0 - 0x7FFF_FFFF ) is user virtual, translated by MMU | |
327 | -Upper 2G (0x8000_0000 onwards) is untranslated, for kernel | |
328 | Typically Linux kernel is linked at the start of untransalted addr, | |
329 | hence the default value of 0x8zs. | |
330 | However some customers have peripherals mapped at this addr, so | |
331 | Linux needs to be scooted a bit. | |
332 | If you don't know what the above means, leave this setting alone. | |
333 | ||
cfdbc2e1 VG |
334 | endmenu # "Platform Board Configuration" |
335 | ||
080c3747 VG |
336 | config ARC_CURR_IN_REG |
337 | bool "Dedicate Register r25 for current_task pointer" | |
338 | default y | |
339 | help | |
340 | This reserved Register R25 to point to Current Task in | |
341 | kernel mode. This saves memory access for each such access | |
342 | ||
2e651ea1 VG |
343 | |
344 | config ARC_MISALIGN_ACCESS | |
345 | bool "Emulate unaligned memory access (userspace only)" | |
346 | default N | |
347 | select SYSCTL_ARCH_UNALIGN_NO_WARN | |
348 | select SYSCTL_ARCH_UNALIGN_ALLOW | |
349 | help | |
350 | This enables misaligned 16 & 32 bit memory access from user space. | |
351 | Use ONLY-IF-ABS-NECESSARY as it will be very slow and also can hide | |
352 | potential bugs in code | |
353 | ||
cfdbc2e1 VG |
354 | config ARC_STACK_NONEXEC |
355 | bool "Make stack non-executable" | |
356 | default n | |
357 | help | |
358 | To disable the execute permissions of stack/heap of processes | |
359 | which are enabled by default. | |
360 | ||
361 | config HZ | |
362 | int "Timer Frequency" | |
363 | default 100 | |
364 | ||
365 | menuconfig ARC_DBG | |
366 | bool "ARC debugging" | |
367 | default y | |
368 | ||
854a0d95 VG |
369 | config ARC_DW2_UNWIND |
370 | bool "Enable DWARF specific kernel stack unwind" | |
371 | depends on ARC_DBG | |
372 | default y | |
373 | select KALLSYMS | |
374 | help | |
375 | Compiles the kernel with DWARF unwind information and can be used | |
376 | to get stack backtraces. | |
377 | ||
378 | If you say Y here the resulting kernel image will be slightly larger | |
379 | but not slower, and it will give very useful debugging information. | |
380 | If you don't debug the kernel, you can say N, but we may not be able | |
381 | to solve problems without frame unwind information | |
382 | ||
cfdbc2e1 VG |
383 | config ARC_DBG_TLB_PARANOIA |
384 | bool "Paranoia Checks in Low Level TLB Handlers" | |
f46121bd | 385 | depends on ARC_DBG |
cfdbc2e1 VG |
386 | default n |
387 | ||
388 | config ARC_DBG_TLB_MISS_COUNT | |
389 | bool "Profile TLB Misses" | |
390 | default n | |
391 | select DEBUG_FS | |
392 | depends on ARC_DBG | |
393 | help | |
394 | Counts number of I and D TLB Misses and exports them via Debugfs | |
395 | The counters can be cleared via Debugfs as well | |
396 | ||
397 | config CMDLINE | |
398 | string "Kernel command line to built-in" | |
399 | default "print-fatal-signals=1" | |
400 | help | |
401 | The default command line which will be appended to the optional | |
402 | u-boot provided command line (see below) | |
403 | ||
404 | config CMDLINE_UBOOT | |
405 | bool "Support U-boot kernel command line passing" | |
406 | default n | |
407 | help | |
408 | If you are using U-boot (www.denx.de) and wish to pass the kernel | |
409 | command line from the U-boot environment to the Linux kernel then | |
410 | switch this option on. | |
411 | ARC U-boot will setup the cmdline in RAM/flash and set r2 to point | |
412 | to it. kernel startup code will copy the string into cmdline buffer | |
413 | and also append CONFIG_CMDLINE. | |
414 | ||
999159a5 VG |
415 | config ARC_BUILTIN_DTB_NAME |
416 | string "Built in DTB" | |
417 | help | |
418 | Set the name of the DTB to embed in the vmlinux binary | |
419 | Leaving it blank selects the minimal "skeleton" dtb | |
420 | ||
cfdbc2e1 VG |
421 | source "kernel/Kconfig.preempt" |
422 | ||
423 | endmenu # "ARC Architecture Configuration" | |
424 | ||
425 | source "mm/Kconfig" | |
426 | source "net/Kconfig" | |
427 | source "drivers/Kconfig" | |
428 | source "fs/Kconfig" | |
429 | source "arch/arc/Kconfig.debug" | |
430 | source "security/Kconfig" | |
431 | source "crypto/Kconfig" | |
432 | source "lib/Kconfig" |