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cfdbc2e1 VG |
1 | # |
2 | # Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) | |
3 | # | |
4 | # This program is free software; you can redistribute it and/or modify | |
5 | # it under the terms of the GNU General Public License version 2 as | |
6 | # published by the Free Software Foundation. | |
7 | # | |
8 | ||
9 | config ARC | |
10 | def_bool y | |
11 | select ARCH_NO_VIRT_TO_BUS | |
4adeefe1 | 12 | select CLONE_BACKWARDS |
cfdbc2e1 VG |
13 | # ARC Busybox based initramfs absolutely relies on DEVTMPFS for /dev |
14 | select DEVTMPFS if !INITRAMFS_SOURCE="" | |
15 | select GENERIC_ATOMIC64 | |
16 | select GENERIC_CLOCKEVENTS | |
17 | select GENERIC_FIND_FIRST_BIT | |
18 | # for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP | |
19 | select GENERIC_IRQ_SHOW | |
bf90e1ea VG |
20 | select GENERIC_KERNEL_EXECVE |
21 | select GENERIC_KERNEL_THREAD | |
cfdbc2e1 | 22 | select GENERIC_PENDING_IRQ if SMP |
c3581039 | 23 | select GENERIC_SIGALTSTACK |
cfdbc2e1 | 24 | select GENERIC_SMP_IDLE_THREAD |
547f1125 | 25 | select HAVE_ARCH_TRACEHOOK |
cfdbc2e1 | 26 | select HAVE_GENERIC_HARDIRQS |
c121c506 | 27 | select HAVE_MEMBLOCK |
854a0d95 | 28 | select HAVE_MOD_ARCH_SPECIFIC if ARC_DW2_UNWIND |
769bc1fd | 29 | select HAVE_OPROFILE |
999159a5 | 30 | select IRQ_DOMAIN |
cfdbc2e1 | 31 | select MODULES_USE_ELF_RELA |
c121c506 | 32 | select NO_BOOTMEM |
999159a5 VG |
33 | select OF |
34 | select OF_EARLY_FLATTREE | |
cfdbc2e1 VG |
35 | |
36 | config SCHED_OMIT_FRAME_POINTER | |
37 | def_bool y | |
38 | ||
39 | config GENERIC_CSUM | |
40 | def_bool y | |
41 | ||
42 | config RWSEM_GENERIC_SPINLOCK | |
43 | def_bool y | |
44 | ||
45 | config ARCH_FLATMEM_ENABLE | |
46 | def_bool y | |
47 | ||
48 | config MMU | |
49 | def_bool y | |
50 | ||
51 | config NO_IOPORT | |
52 | def_bool y | |
53 | ||
54 | config GENERIC_CALIBRATE_DELAY | |
55 | def_bool y | |
56 | ||
57 | config GENERIC_HWEIGHT | |
58 | def_bool y | |
59 | ||
60 | config BINFMT_ELF | |
61 | def_bool y | |
62 | ||
63 | config HAVE_LATENCYTOP_SUPPORT | |
64 | def_bool y | |
65 | ||
66 | config NO_DMA | |
67 | def_bool n | |
68 | ||
69 | source "init/Kconfig" | |
70 | source "kernel/Kconfig.freezer" | |
71 | ||
72 | menu "ARC Architecture Configuration" | |
73 | ||
74 | choice | |
75 | prompt "ARC Platform" | |
76 | default ARC_PLAT_FPGA_LEGACY | |
77 | ||
78 | config ARC_PLAT_FPGA_LEGACY | |
79 | bool "\"Legacy\" ARC FPGA dev platform" | |
80 | help | |
81 | Support for ARC development platforms, provided by Synopsys. | |
82 | These are based on FPGA or ISS. e.g. | |
83 | - ARCAngel4 | |
84 | - ML509 | |
85 | - MetaWare ISS | |
86 | ||
87 | #New platform adds here | |
88 | endchoice | |
89 | ||
90 | menu "ARC CPU Configuration" | |
91 | ||
92 | choice | |
93 | prompt "ARC Core" | |
94 | default ARC_CPU_770 | |
95 | ||
96 | config ARC_CPU_750D | |
97 | bool "ARC750D" | |
98 | help | |
99 | Support for ARC750 core | |
100 | ||
101 | config ARC_CPU_770 | |
102 | bool "ARC770" | |
103 | select ARC_CPU_REL_4_10 | |
104 | help | |
105 | Support for ARC770 core introduced with Rel 4.10 (Summer 2011) | |
106 | This core has a bunch of cool new features: | |
107 | -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4) | |
108 | Shared Address Spaces (for sharing TLB entires in MMU) | |
109 | -Caches: New Prog Model, Region Flush | |
110 | -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr | |
111 | ||
112 | endchoice | |
113 | ||
114 | config CPU_BIG_ENDIAN | |
115 | bool "Enable Big Endian Mode" | |
116 | default n | |
117 | help | |
118 | Build kernel for Big Endian Mode of ARC CPU | |
119 | ||
41195d23 VG |
120 | config SMP |
121 | bool "Symmetric Multi-Processing (Incomplete)" | |
122 | default n | |
123 | select USE_GENERIC_SMP_HELPERS | |
124 | help | |
125 | This enables support for systems with more than one CPU. If you have | |
126 | a system with only one CPU, like most personal computers, say N. If | |
127 | you have a system with more than one CPU, say Y. | |
128 | ||
129 | if SMP | |
130 | ||
131 | config ARC_HAS_COH_CACHES | |
132 | def_bool n | |
133 | ||
134 | config ARC_HAS_COH_LLSC | |
135 | def_bool n | |
136 | ||
137 | config ARC_HAS_COH_RTSC | |
138 | def_bool n | |
139 | ||
140 | config ARC_HAS_REENTRANT_IRQ_LV2 | |
141 | def_bool n | |
142 | ||
143 | endif | |
144 | ||
145 | config NR_CPUS | |
146 | int "Maximum number of CPUs (2-32)" | |
147 | range 2 32 | |
148 | depends on SMP | |
149 | default "2" | |
150 | ||
cfdbc2e1 VG |
151 | menuconfig ARC_CACHE |
152 | bool "Enable Cache Support" | |
153 | default y | |
41195d23 VG |
154 | # if SMP, cache enabled ONLY if ARC implementation has cache coherency |
155 | depends on !SMP || ARC_HAS_COH_CACHES | |
cfdbc2e1 VG |
156 | |
157 | if ARC_CACHE | |
158 | ||
159 | config ARC_CACHE_LINE_SHIFT | |
160 | int "Cache Line Length (as power of 2)" | |
161 | range 5 7 | |
162 | default "6" | |
163 | help | |
164 | Starting with ARC700 4.9, Cache line length is configurable, | |
165 | This option specifies "N", with Line-len = 2 power N | |
166 | So line lengths of 32, 64, 128 are specified by 5,6,7, respectively | |
167 | Linux only supports same line lengths for I and D caches. | |
168 | ||
169 | config ARC_HAS_ICACHE | |
170 | bool "Use Instruction Cache" | |
171 | default y | |
172 | ||
173 | config ARC_HAS_DCACHE | |
174 | bool "Use Data Cache" | |
175 | default y | |
176 | ||
177 | config ARC_CACHE_PAGES | |
178 | bool "Per Page Cache Control" | |
179 | default y | |
180 | depends on ARC_HAS_ICACHE || ARC_HAS_DCACHE | |
181 | help | |
182 | This can be used to over-ride the global I/D Cache Enable on a | |
183 | per-page basis (but only for pages accessed via MMU such as | |
184 | Kernel Virtual address or User Virtual Address) | |
185 | TLB entries have a per-page Cache Enable Bit. | |
186 | Note that Global I/D ENABLE + Per Page DISABLE works but corollary | |
187 | Global DISABLE + Per Page ENABLE won't work | |
188 | ||
189 | endif #ARC_CACHE | |
190 | ||
191 | config ARC_HAS_HW_MPY | |
192 | bool "Use Hardware Multiplier (Normal or Faster XMAC)" | |
193 | default y | |
194 | help | |
195 | Influences how gcc generates code for MPY operations. | |
196 | If enabled, MPYxx insns are generated, provided by Standard/XMAC | |
197 | Multipler. Otherwise software multipy lib is used | |
198 | ||
199 | choice | |
200 | prompt "ARC700 MMU Version" | |
201 | default ARC_MMU_V3 if ARC_CPU_770 | |
202 | default ARC_MMU_V2 if ARC_CPU_750D | |
203 | ||
204 | config ARC_MMU_V1 | |
205 | bool "MMU v1" | |
206 | help | |
207 | Orig ARC700 MMU | |
208 | ||
209 | config ARC_MMU_V2 | |
210 | bool "MMU v2" | |
211 | help | |
212 | Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio | |
213 | when 2 D-TLB and 1 I-TLB entries index into same 2way set. | |
214 | ||
215 | config ARC_MMU_V3 | |
216 | bool "MMU v3" | |
217 | depends on ARC_CPU_770 | |
218 | help | |
219 | Introduced with ARC700 4.10: New Features | |
220 | Variable Page size (1k-16k), var JTLB size 128 x (2 or 4) | |
221 | Shared Address Spaces (SASID) | |
222 | ||
223 | endchoice | |
224 | ||
225 | ||
226 | choice | |
227 | prompt "MMU Page Size" | |
228 | default ARC_PAGE_SIZE_8K | |
229 | ||
230 | config ARC_PAGE_SIZE_8K | |
231 | bool "8KB" | |
232 | help | |
233 | Choose between 8k vs 16k | |
234 | ||
235 | config ARC_PAGE_SIZE_16K | |
236 | bool "16KB" | |
237 | depends on ARC_MMU_V3 | |
238 | ||
239 | config ARC_PAGE_SIZE_4K | |
240 | bool "4KB" | |
241 | depends on ARC_MMU_V3 | |
242 | ||
243 | endchoice | |
244 | ||
4788a594 VG |
245 | config ARC_COMPACT_IRQ_LEVELS |
246 | bool "ARCompact IRQ Priorities: High(2)/Low(1)" | |
247 | default n | |
248 | # Timer HAS to be high priority, for any other high priority config | |
249 | select ARC_IRQ3_LV2 | |
41195d23 VG |
250 | # if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy |
251 | depends on !SMP || ARC_HAS_REENTRANT_IRQ_LV2 | |
4788a594 VG |
252 | |
253 | if ARC_COMPACT_IRQ_LEVELS | |
254 | ||
255 | config ARC_IRQ3_LV2 | |
256 | bool | |
257 | ||
258 | config ARC_IRQ5_LV2 | |
259 | bool | |
260 | ||
261 | config ARC_IRQ6_LV2 | |
262 | bool | |
263 | ||
264 | endif | |
265 | ||
cfdbc2e1 VG |
266 | config ARC_FPU_SAVE_RESTORE |
267 | bool "Enable FPU state persistence across context switch" | |
268 | default n | |
269 | help | |
270 | Double Precision Floating Point unit had dedictaed regs which | |
271 | need to be saved/restored across context-switch. | |
272 | Note that ARC FPU is overly simplistic, unlike say x86, which has | |
273 | hardware pieces to allow software to conditionally save/restore, | |
274 | based on actual usage of FPU by a task. Thus our implemn does | |
275 | this for all tasks in system. | |
276 | ||
277 | menuconfig ARC_CPU_REL_4_10 | |
278 | bool "Enable support for Rel 4.10 features" | |
279 | default n | |
280 | help | |
281 | -ARC770 (and dependent features) enabled | |
282 | -ARC750 also shares some of the new features with 770 | |
283 | ||
284 | config ARC_HAS_LLSC | |
285 | bool "Insn: LLOCK/SCOND (efficient atomic ops)" | |
286 | default y | |
287 | depends on ARC_CPU_770 | |
288 | # if SMP, enable LLSC ONLY if ARC implementation has coherent atomics | |
289 | depends on !SMP || ARC_HAS_COH_LLSC | |
290 | ||
291 | config ARC_HAS_SWAPE | |
292 | bool "Insn: SWAPE (endian-swap)" | |
293 | default y | |
294 | depends on ARC_CPU_REL_4_10 | |
295 | ||
296 | config ARC_HAS_RTSC | |
297 | bool "Insn: RTSC (64-bit r/o cycle counter)" | |
298 | default y | |
299 | depends on ARC_CPU_REL_4_10 | |
41195d23 VG |
300 | # if SMP, enable RTSC only if counter is coherent across cores |
301 | depends on !SMP || ARC_HAS_COH_RTSC | |
cfdbc2e1 VG |
302 | |
303 | endmenu # "ARC CPU Configuration" | |
304 | ||
305 | menu "Platform Board Configuration" | |
306 | ||
307 | source "arch/arc/plat-arcfpga/Kconfig" | |
308 | ||
309 | #New platform adds here | |
310 | ||
cfdbc2e1 VG |
311 | config LINUX_LINK_BASE |
312 | hex "Linux Link Address" | |
313 | default "0x80000000" | |
314 | help | |
315 | ARC700 divides the 32 bit phy address space into two equal halves | |
316 | -Lower 2G (0 - 0x7FFF_FFFF ) is user virtual, translated by MMU | |
317 | -Upper 2G (0x8000_0000 onwards) is untranslated, for kernel | |
318 | Typically Linux kernel is linked at the start of untransalted addr, | |
319 | hence the default value of 0x8zs. | |
320 | However some customers have peripherals mapped at this addr, so | |
321 | Linux needs to be scooted a bit. | |
322 | If you don't know what the above means, leave this setting alone. | |
323 | ||
cfdbc2e1 VG |
324 | endmenu # "Platform Board Configuration" |
325 | ||
080c3747 VG |
326 | config ARC_CURR_IN_REG |
327 | bool "Dedicate Register r25 for current_task pointer" | |
328 | default y | |
329 | help | |
330 | This reserved Register R25 to point to Current Task in | |
331 | kernel mode. This saves memory access for each such access | |
332 | ||
cfdbc2e1 VG |
333 | config ARC_STACK_NONEXEC |
334 | bool "Make stack non-executable" | |
335 | default n | |
336 | help | |
337 | To disable the execute permissions of stack/heap of processes | |
338 | which are enabled by default. | |
339 | ||
340 | config HZ | |
341 | int "Timer Frequency" | |
342 | default 100 | |
343 | ||
344 | menuconfig ARC_DBG | |
345 | bool "ARC debugging" | |
346 | default y | |
347 | ||
854a0d95 VG |
348 | config ARC_DW2_UNWIND |
349 | bool "Enable DWARF specific kernel stack unwind" | |
350 | depends on ARC_DBG | |
351 | default y | |
352 | select KALLSYMS | |
353 | help | |
354 | Compiles the kernel with DWARF unwind information and can be used | |
355 | to get stack backtraces. | |
356 | ||
357 | If you say Y here the resulting kernel image will be slightly larger | |
358 | but not slower, and it will give very useful debugging information. | |
359 | If you don't debug the kernel, you can say N, but we may not be able | |
360 | to solve problems without frame unwind information | |
361 | ||
cfdbc2e1 VG |
362 | config ARC_DBG_TLB_PARANOIA |
363 | bool "Paranoia Checks in Low Level TLB Handlers" | |
41195d23 | 364 | depends on ARC_DBG && !SMP |
cfdbc2e1 VG |
365 | default n |
366 | ||
367 | config ARC_DBG_TLB_MISS_COUNT | |
368 | bool "Profile TLB Misses" | |
369 | default n | |
370 | select DEBUG_FS | |
371 | depends on ARC_DBG | |
372 | help | |
373 | Counts number of I and D TLB Misses and exports them via Debugfs | |
374 | The counters can be cleared via Debugfs as well | |
375 | ||
376 | config CMDLINE | |
377 | string "Kernel command line to built-in" | |
378 | default "print-fatal-signals=1" | |
379 | help | |
380 | The default command line which will be appended to the optional | |
381 | u-boot provided command line (see below) | |
382 | ||
383 | config CMDLINE_UBOOT | |
384 | bool "Support U-boot kernel command line passing" | |
385 | default n | |
386 | help | |
387 | If you are using U-boot (www.denx.de) and wish to pass the kernel | |
388 | command line from the U-boot environment to the Linux kernel then | |
389 | switch this option on. | |
390 | ARC U-boot will setup the cmdline in RAM/flash and set r2 to point | |
391 | to it. kernel startup code will copy the string into cmdline buffer | |
392 | and also append CONFIG_CMDLINE. | |
393 | ||
999159a5 VG |
394 | config ARC_BUILTIN_DTB_NAME |
395 | string "Built in DTB" | |
396 | help | |
397 | Set the name of the DTB to embed in the vmlinux binary | |
398 | Leaving it blank selects the minimal "skeleton" dtb | |
399 | ||
cfdbc2e1 VG |
400 | source "kernel/Kconfig.preempt" |
401 | ||
402 | endmenu # "ARC Architecture Configuration" | |
403 | ||
404 | source "mm/Kconfig" | |
405 | source "net/Kconfig" | |
406 | source "drivers/Kconfig" | |
407 | source "fs/Kconfig" | |
408 | source "arch/arc/Kconfig.debug" | |
409 | source "security/Kconfig" | |
410 | source "crypto/Kconfig" | |
411 | source "lib/Kconfig" |