ARC: [nsimosci] Allow "headless" models to boot
[linux-2.6-block.git] / arch / arc / Kconfig
CommitLineData
cfdbc2e1
VG
1#
2# Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
3#
4# This program is free software; you can redistribute it and/or modify
5# it under the terms of the GNU General Public License version 2 as
6# published by the Free Software Foundation.
7#
8
9config ARC
10 def_bool y
f06d19e4 11 select BUILDTIME_EXTABLE_SORT
d7f8a085 12 select COMMON_CLK
4adeefe1 13 select CLONE_BACKWARDS
cfdbc2e1
VG
14 # ARC Busybox based initramfs absolutely relies on DEVTMPFS for /dev
15 select DEVTMPFS if !INITRAMFS_SOURCE=""
16 select GENERIC_ATOMIC64
17 select GENERIC_CLOCKEVENTS
18 select GENERIC_FIND_FIRST_BIT
19 # for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP
20 select GENERIC_IRQ_SHOW
21 select GENERIC_PENDING_IRQ if SMP
22 select GENERIC_SMP_IDLE_THREAD
f46121bd 23 select HAVE_ARCH_KGDB
547f1125 24 select HAVE_ARCH_TRACEHOOK
4368902b 25 select HAVE_IOREMAP_PROT
4d86dfbb
VG
26 select HAVE_KPROBES
27 select HAVE_KRETPROBES
c121c506 28 select HAVE_MEMBLOCK
854a0d95 29 select HAVE_MOD_ARCH_SPECIFIC if ARC_DW2_UNWIND
769bc1fd 30 select HAVE_OPROFILE
9c57564e 31 select HAVE_PERF_EVENTS
999159a5 32 select IRQ_DOMAIN
cfdbc2e1 33 select MODULES_USE_ELF_RELA
c121c506 34 select NO_BOOTMEM
999159a5
VG
35 select OF
36 select OF_EARLY_FLATTREE
9c57564e 37 select PERF_USE_VMALLOC
d1a1dc0b 38 select HAVE_DEBUG_STACKOVERFLOW
cfdbc2e1 39
0dafafc3
VG
40config TRACE_IRQFLAGS_SUPPORT
41 def_bool y
42
43config LOCKDEP_SUPPORT
44 def_bool y
45
cfdbc2e1
VG
46config SCHED_OMIT_FRAME_POINTER
47 def_bool y
48
49config GENERIC_CSUM
50 def_bool y
51
52config RWSEM_GENERIC_SPINLOCK
53 def_bool y
54
55config ARCH_FLATMEM_ENABLE
56 def_bool y
57
58config MMU
59 def_bool y
60
ce816fa8 61config NO_IOPORT_MAP
cfdbc2e1
VG
62 def_bool y
63
64config GENERIC_CALIBRATE_DELAY
65 def_bool y
66
67config GENERIC_HWEIGHT
68 def_bool y
69
44c8bb91
VG
70config STACKTRACE_SUPPORT
71 def_bool y
72 select STACKTRACE
73
cfdbc2e1
VG
74config HAVE_LATENCYTOP_SUPPORT
75 def_bool y
76
77config NO_DMA
78 def_bool n
79
80source "init/Kconfig"
81source "kernel/Kconfig.freezer"
82
83menu "ARC Architecture Configuration"
84
93ad700d 85menu "ARC Platform/SoC/Board"
cfdbc2e1 86
93ad700d 87source "arch/arc/plat-arcfpga/Kconfig"
072eb693 88source "arch/arc/plat-tb10x/Kconfig"
cfdbc2e1 89#New platform adds here
93ad700d 90
53d98958 91endmenu
cfdbc2e1
VG
92
93menu "ARC CPU Configuration"
94
95choice
96 prompt "ARC Core"
97 default ARC_CPU_770
98
99config ARC_CPU_750D
100 bool "ARC750D"
101 help
102 Support for ARC750 core
103
104config ARC_CPU_770
105 bool "ARC770"
106 select ARC_CPU_REL_4_10
107 help
108 Support for ARC770 core introduced with Rel 4.10 (Summer 2011)
109 This core has a bunch of cool new features:
110 -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4)
111 Shared Address Spaces (for sharing TLB entires in MMU)
112 -Caches: New Prog Model, Region Flush
113 -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr
114
115endchoice
116
117config CPU_BIG_ENDIAN
118 bool "Enable Big Endian Mode"
119 default n
120 help
121 Build kernel for Big Endian Mode of ARC CPU
122
fc7943d2
VG
123# If a platform can't work with 0x8000_0000 based dma_addr_t
124config ARC_PLAT_NEEDS_CPU_TO_DMA
125 bool
126
41195d23
VG
127config SMP
128 bool "Symmetric Multi-Processing (Incomplete)"
129 default n
41195d23
VG
130 help
131 This enables support for systems with more than one CPU. If you have
4a474157
RG
132 a system with only one CPU, say N. If you have a system with more
133 than one CPU, say Y.
41195d23
VG
134
135if SMP
136
137config ARC_HAS_COH_CACHES
138 def_bool n
139
41195d23
VG
140config ARC_HAS_REENTRANT_IRQ_LV2
141 def_bool n
142
143endif
144
145config NR_CPUS
3aa4f80e
NC
146 int "Maximum number of CPUs (2-4096)"
147 range 2 4096
41195d23
VG
148 depends on SMP
149 default "2"
150
cfdbc2e1
VG
151menuconfig ARC_CACHE
152 bool "Enable Cache Support"
153 default y
41195d23
VG
154 # if SMP, cache enabled ONLY if ARC implementation has cache coherency
155 depends on !SMP || ARC_HAS_COH_CACHES
cfdbc2e1
VG
156
157if ARC_CACHE
158
159config ARC_CACHE_LINE_SHIFT
160 int "Cache Line Length (as power of 2)"
161 range 5 7
162 default "6"
163 help
164 Starting with ARC700 4.9, Cache line length is configurable,
165 This option specifies "N", with Line-len = 2 power N
166 So line lengths of 32, 64, 128 are specified by 5,6,7, respectively
167 Linux only supports same line lengths for I and D caches.
168
169config ARC_HAS_ICACHE
170 bool "Use Instruction Cache"
171 default y
172
173config ARC_HAS_DCACHE
174 bool "Use Data Cache"
175 default y
176
177config ARC_CACHE_PAGES
178 bool "Per Page Cache Control"
179 default y
180 depends on ARC_HAS_ICACHE || ARC_HAS_DCACHE
181 help
182 This can be used to over-ride the global I/D Cache Enable on a
183 per-page basis (but only for pages accessed via MMU such as
184 Kernel Virtual address or User Virtual Address)
185 TLB entries have a per-page Cache Enable Bit.
186 Note that Global I/D ENABLE + Per Page DISABLE works but corollary
187 Global DISABLE + Per Page ENABLE won't work
188
4102b533
VG
189config ARC_CACHE_VIPT_ALIASING
190 bool "Support VIPT Aliasing D$"
2f9e9961 191 depends on ARC_HAS_DCACHE
4102b533
VG
192 default n
193
cfdbc2e1
VG
194endif #ARC_CACHE
195
8b5850f8
VG
196config ARC_HAS_ICCM
197 bool "Use ICCM"
198 help
199 Single Cycle RAMS to store Fast Path Code
200 default n
201
202config ARC_ICCM_SZ
203 int "ICCM Size in KB"
204 default "64"
205 depends on ARC_HAS_ICCM
206
207config ARC_HAS_DCCM
208 bool "Use DCCM"
209 help
210 Single Cycle RAMS to store Fast Path Data
211 default n
212
213config ARC_DCCM_SZ
214 int "DCCM Size in KB"
215 default "64"
216 depends on ARC_HAS_DCCM
217
218config ARC_DCCM_BASE
219 hex "DCCM map address"
220 default "0xA0000000"
221 depends on ARC_HAS_DCCM
222
cfdbc2e1
VG
223config ARC_HAS_HW_MPY
224 bool "Use Hardware Multiplier (Normal or Faster XMAC)"
225 default y
226 help
227 Influences how gcc generates code for MPY operations.
228 If enabled, MPYxx insns are generated, provided by Standard/XMAC
229 Multipler. Otherwise software multipy lib is used
230
231choice
232 prompt "ARC700 MMU Version"
233 default ARC_MMU_V3 if ARC_CPU_770
234 default ARC_MMU_V2 if ARC_CPU_750D
235
236config ARC_MMU_V1
237 bool "MMU v1"
238 help
239 Orig ARC700 MMU
240
241config ARC_MMU_V2
242 bool "MMU v2"
243 help
244 Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio
245 when 2 D-TLB and 1 I-TLB entries index into same 2way set.
246
247config ARC_MMU_V3
248 bool "MMU v3"
249 depends on ARC_CPU_770
250 help
251 Introduced with ARC700 4.10: New Features
252 Variable Page size (1k-16k), var JTLB size 128 x (2 or 4)
253 Shared Address Spaces (SASID)
254
255endchoice
256
257
258choice
259 prompt "MMU Page Size"
260 default ARC_PAGE_SIZE_8K
261
262config ARC_PAGE_SIZE_8K
263 bool "8KB"
264 help
265 Choose between 8k vs 16k
266
267config ARC_PAGE_SIZE_16K
268 bool "16KB"
269 depends on ARC_MMU_V3
270
271config ARC_PAGE_SIZE_4K
272 bool "4KB"
273 depends on ARC_MMU_V3
274
275endchoice
276
4788a594
VG
277config ARC_COMPACT_IRQ_LEVELS
278 bool "ARCompact IRQ Priorities: High(2)/Low(1)"
279 default n
280 # Timer HAS to be high priority, for any other high priority config
281 select ARC_IRQ3_LV2
41195d23
VG
282 # if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy
283 depends on !SMP || ARC_HAS_REENTRANT_IRQ_LV2
4788a594
VG
284
285if ARC_COMPACT_IRQ_LEVELS
286
287config ARC_IRQ3_LV2
288 bool
289
290config ARC_IRQ5_LV2
291 bool
292
293config ARC_IRQ6_LV2
294 bool
295
296endif
297
cfdbc2e1
VG
298config ARC_FPU_SAVE_RESTORE
299 bool "Enable FPU state persistence across context switch"
300 default n
301 help
302 Double Precision Floating Point unit had dedictaed regs which
303 need to be saved/restored across context-switch.
304 Note that ARC FPU is overly simplistic, unlike say x86, which has
305 hardware pieces to allow software to conditionally save/restore,
306 based on actual usage of FPU by a task. Thus our implemn does
307 this for all tasks in system.
308
fbf8e13d
VG
309config ARC_CANT_LLSC
310 def_bool n
311
cfdbc2e1
VG
312menuconfig ARC_CPU_REL_4_10
313 bool "Enable support for Rel 4.10 features"
314 default n
315 help
316 -ARC770 (and dependent features) enabled
317 -ARC750 also shares some of the new features with 770
318
319config ARC_HAS_LLSC
320 bool "Insn: LLOCK/SCOND (efficient atomic ops)"
321 default y
fbf8e13d 322 depends on ARC_CPU_770 && !ARC_CANT_LLSC
cfdbc2e1
VG
323
324config ARC_HAS_SWAPE
325 bool "Insn: SWAPE (endian-swap)"
326 default y
327 depends on ARC_CPU_REL_4_10
328
329config ARC_HAS_RTSC
330 bool "Insn: RTSC (64-bit r/o cycle counter)"
331 default y
332 depends on ARC_CPU_REL_4_10
7d0857a5 333 depends on !SMP
cfdbc2e1
VG
334
335endmenu # "ARC CPU Configuration"
336
cfdbc2e1
VG
337config LINUX_LINK_BASE
338 hex "Linux Link Address"
339 default "0x80000000"
340 help
341 ARC700 divides the 32 bit phy address space into two equal halves
342 -Lower 2G (0 - 0x7FFF_FFFF ) is user virtual, translated by MMU
343 -Upper 2G (0x8000_0000 onwards) is untranslated, for kernel
344 Typically Linux kernel is linked at the start of untransalted addr,
345 hence the default value of 0x8zs.
346 However some customers have peripherals mapped at this addr, so
347 Linux needs to be scooted a bit.
348 If you don't know what the above means, leave this setting alone.
349
080c3747
VG
350config ARC_CURR_IN_REG
351 bool "Dedicate Register r25 for current_task pointer"
352 default y
353 help
354 This reserved Register R25 to point to Current Task in
355 kernel mode. This saves memory access for each such access
356
2e651ea1
VG
357
358config ARC_MISALIGN_ACCESS
359 bool "Emulate unaligned memory access (userspace only)"
2e651ea1
VG
360 select SYSCTL_ARCH_UNALIGN_NO_WARN
361 select SYSCTL_ARCH_UNALIGN_ALLOW
362 help
363 This enables misaligned 16 & 32 bit memory access from user space.
364 Use ONLY-IF-ABS-NECESSARY as it will be very slow and also can hide
365 potential bugs in code
366
cfdbc2e1
VG
367config HZ
368 int "Timer Frequency"
369 default 100
370
cbe056f7
VG
371config ARC_METAWARE_HLINK
372 bool "Support for Metaware debugger assisted Host access"
373 default n
374 help
375 This options allows a Linux userland apps to directly access
376 host file system (open/creat/read/write etc) with help from
377 Metaware Debugger. This can come in handy for Linux-host communication
378 when there is no real usable peripheral such as EMAC.
379
cfdbc2e1
VG
380menuconfig ARC_DBG
381 bool "ARC debugging"
382 default y
383
854a0d95
VG
384config ARC_DW2_UNWIND
385 bool "Enable DWARF specific kernel stack unwind"
386 depends on ARC_DBG
387 default y
388 select KALLSYMS
389 help
390 Compiles the kernel with DWARF unwind information and can be used
391 to get stack backtraces.
392
393 If you say Y here the resulting kernel image will be slightly larger
394 but not slower, and it will give very useful debugging information.
395 If you don't debug the kernel, you can say N, but we may not be able
396 to solve problems without frame unwind information
397
cfdbc2e1
VG
398config ARC_DBG_TLB_PARANOIA
399 bool "Paranoia Checks in Low Level TLB Handlers"
f46121bd 400 depends on ARC_DBG
cfdbc2e1
VG
401 default n
402
403config ARC_DBG_TLB_MISS_COUNT
404 bool "Profile TLB Misses"
405 default n
406 select DEBUG_FS
407 depends on ARC_DBG
408 help
409 Counts number of I and D TLB Misses and exports them via Debugfs
410 The counters can be cleared via Debugfs as well
411
999159a5
VG
412config ARC_BUILTIN_DTB_NAME
413 string "Built in DTB"
414 help
415 Set the name of the DTB to embed in the vmlinux binary
416 Leaving it blank selects the minimal "skeleton" dtb
417
cfdbc2e1
VG
418source "kernel/Kconfig.preempt"
419
5628832f
VG
420menu "Executable file formats"
421source "fs/Kconfig.binfmt"
422endmenu
423
cfdbc2e1
VG
424endmenu # "ARC Architecture Configuration"
425
426source "mm/Kconfig"
427source "net/Kconfig"
428source "drivers/Kconfig"
429source "fs/Kconfig"
430source "arch/arc/Kconfig.debug"
431source "security/Kconfig"
432source "crypto/Kconfig"
433source "lib/Kconfig"