ARC: [optim] Cache "current" in Register r25
[linux-2.6-block.git] / arch / arc / Kconfig
CommitLineData
cfdbc2e1
VG
1#
2# Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
3#
4# This program is free software; you can redistribute it and/or modify
5# it under the terms of the GNU General Public License version 2 as
6# published by the Free Software Foundation.
7#
8
9config ARC
10 def_bool y
11 select ARCH_NO_VIRT_TO_BUS
4adeefe1 12 select CLONE_BACKWARDS
cfdbc2e1
VG
13 # ARC Busybox based initramfs absolutely relies on DEVTMPFS for /dev
14 select DEVTMPFS if !INITRAMFS_SOURCE=""
15 select GENERIC_ATOMIC64
16 select GENERIC_CLOCKEVENTS
17 select GENERIC_FIND_FIRST_BIT
18 # for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP
19 select GENERIC_IRQ_SHOW
bf90e1ea
VG
20 select GENERIC_KERNEL_EXECVE
21 select GENERIC_KERNEL_THREAD
cfdbc2e1 22 select GENERIC_PENDING_IRQ if SMP
c3581039 23 select GENERIC_SIGALTSTACK
cfdbc2e1
VG
24 select GENERIC_SMP_IDLE_THREAD
25 select HAVE_GENERIC_HARDIRQS
c121c506 26 select HAVE_MEMBLOCK
999159a5 27 select IRQ_DOMAIN
cfdbc2e1 28 select MODULES_USE_ELF_RELA
c121c506 29 select NO_BOOTMEM
999159a5
VG
30 select OF
31 select OF_EARLY_FLATTREE
cfdbc2e1
VG
32
33config SCHED_OMIT_FRAME_POINTER
34 def_bool y
35
36config GENERIC_CSUM
37 def_bool y
38
39config RWSEM_GENERIC_SPINLOCK
40 def_bool y
41
42config ARCH_FLATMEM_ENABLE
43 def_bool y
44
45config MMU
46 def_bool y
47
48config NO_IOPORT
49 def_bool y
50
51config GENERIC_CALIBRATE_DELAY
52 def_bool y
53
54config GENERIC_HWEIGHT
55 def_bool y
56
57config BINFMT_ELF
58 def_bool y
59
60config HAVE_LATENCYTOP_SUPPORT
61 def_bool y
62
63config NO_DMA
64 def_bool n
65
66source "init/Kconfig"
67source "kernel/Kconfig.freezer"
68
69menu "ARC Architecture Configuration"
70
71choice
72 prompt "ARC Platform"
73 default ARC_PLAT_FPGA_LEGACY
74
75config ARC_PLAT_FPGA_LEGACY
76 bool "\"Legacy\" ARC FPGA dev platform"
77 help
78 Support for ARC development platforms, provided by Synopsys.
79 These are based on FPGA or ISS. e.g.
80 - ARCAngel4
81 - ML509
82 - MetaWare ISS
83
84#New platform adds here
85endchoice
86
87menu "ARC CPU Configuration"
88
89choice
90 prompt "ARC Core"
91 default ARC_CPU_770
92
93config ARC_CPU_750D
94 bool "ARC750D"
95 help
96 Support for ARC750 core
97
98config ARC_CPU_770
99 bool "ARC770"
100 select ARC_CPU_REL_4_10
101 help
102 Support for ARC770 core introduced with Rel 4.10 (Summer 2011)
103 This core has a bunch of cool new features:
104 -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4)
105 Shared Address Spaces (for sharing TLB entires in MMU)
106 -Caches: New Prog Model, Region Flush
107 -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr
108
109endchoice
110
111config CPU_BIG_ENDIAN
112 bool "Enable Big Endian Mode"
113 default n
114 help
115 Build kernel for Big Endian Mode of ARC CPU
116
117menuconfig ARC_CACHE
118 bool "Enable Cache Support"
119 default y
120
121if ARC_CACHE
122
123config ARC_CACHE_LINE_SHIFT
124 int "Cache Line Length (as power of 2)"
125 range 5 7
126 default "6"
127 help
128 Starting with ARC700 4.9, Cache line length is configurable,
129 This option specifies "N", with Line-len = 2 power N
130 So line lengths of 32, 64, 128 are specified by 5,6,7, respectively
131 Linux only supports same line lengths for I and D caches.
132
133config ARC_HAS_ICACHE
134 bool "Use Instruction Cache"
135 default y
136
137config ARC_HAS_DCACHE
138 bool "Use Data Cache"
139 default y
140
141config ARC_CACHE_PAGES
142 bool "Per Page Cache Control"
143 default y
144 depends on ARC_HAS_ICACHE || ARC_HAS_DCACHE
145 help
146 This can be used to over-ride the global I/D Cache Enable on a
147 per-page basis (but only for pages accessed via MMU such as
148 Kernel Virtual address or User Virtual Address)
149 TLB entries have a per-page Cache Enable Bit.
150 Note that Global I/D ENABLE + Per Page DISABLE works but corollary
151 Global DISABLE + Per Page ENABLE won't work
152
153endif #ARC_CACHE
154
155config ARC_HAS_HW_MPY
156 bool "Use Hardware Multiplier (Normal or Faster XMAC)"
157 default y
158 help
159 Influences how gcc generates code for MPY operations.
160 If enabled, MPYxx insns are generated, provided by Standard/XMAC
161 Multipler. Otherwise software multipy lib is used
162
163choice
164 prompt "ARC700 MMU Version"
165 default ARC_MMU_V3 if ARC_CPU_770
166 default ARC_MMU_V2 if ARC_CPU_750D
167
168config ARC_MMU_V1
169 bool "MMU v1"
170 help
171 Orig ARC700 MMU
172
173config ARC_MMU_V2
174 bool "MMU v2"
175 help
176 Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio
177 when 2 D-TLB and 1 I-TLB entries index into same 2way set.
178
179config ARC_MMU_V3
180 bool "MMU v3"
181 depends on ARC_CPU_770
182 help
183 Introduced with ARC700 4.10: New Features
184 Variable Page size (1k-16k), var JTLB size 128 x (2 or 4)
185 Shared Address Spaces (SASID)
186
187endchoice
188
189
190choice
191 prompt "MMU Page Size"
192 default ARC_PAGE_SIZE_8K
193
194config ARC_PAGE_SIZE_8K
195 bool "8KB"
196 help
197 Choose between 8k vs 16k
198
199config ARC_PAGE_SIZE_16K
200 bool "16KB"
201 depends on ARC_MMU_V3
202
203config ARC_PAGE_SIZE_4K
204 bool "4KB"
205 depends on ARC_MMU_V3
206
207endchoice
208
209config ARC_FPU_SAVE_RESTORE
210 bool "Enable FPU state persistence across context switch"
211 default n
212 help
213 Double Precision Floating Point unit had dedictaed regs which
214 need to be saved/restored across context-switch.
215 Note that ARC FPU is overly simplistic, unlike say x86, which has
216 hardware pieces to allow software to conditionally save/restore,
217 based on actual usage of FPU by a task. Thus our implemn does
218 this for all tasks in system.
219
220menuconfig ARC_CPU_REL_4_10
221 bool "Enable support for Rel 4.10 features"
222 default n
223 help
224 -ARC770 (and dependent features) enabled
225 -ARC750 also shares some of the new features with 770
226
227config ARC_HAS_LLSC
228 bool "Insn: LLOCK/SCOND (efficient atomic ops)"
229 default y
230 depends on ARC_CPU_770
231 # if SMP, enable LLSC ONLY if ARC implementation has coherent atomics
232 depends on !SMP || ARC_HAS_COH_LLSC
233
234config ARC_HAS_SWAPE
235 bool "Insn: SWAPE (endian-swap)"
236 default y
237 depends on ARC_CPU_REL_4_10
238
239config ARC_HAS_RTSC
240 bool "Insn: RTSC (64-bit r/o cycle counter)"
241 default y
242 depends on ARC_CPU_REL_4_10
243
244endmenu # "ARC CPU Configuration"
245
246menu "Platform Board Configuration"
247
248source "arch/arc/plat-arcfpga/Kconfig"
249
250#New platform adds here
251
cfdbc2e1
VG
252config LINUX_LINK_BASE
253 hex "Linux Link Address"
254 default "0x80000000"
255 help
256 ARC700 divides the 32 bit phy address space into two equal halves
257 -Lower 2G (0 - 0x7FFF_FFFF ) is user virtual, translated by MMU
258 -Upper 2G (0x8000_0000 onwards) is untranslated, for kernel
259 Typically Linux kernel is linked at the start of untransalted addr,
260 hence the default value of 0x8zs.
261 However some customers have peripherals mapped at this addr, so
262 Linux needs to be scooted a bit.
263 If you don't know what the above means, leave this setting alone.
264
cfdbc2e1
VG
265endmenu # "Platform Board Configuration"
266
080c3747
VG
267config ARC_CURR_IN_REG
268 bool "Dedicate Register r25 for current_task pointer"
269 default y
270 help
271 This reserved Register R25 to point to Current Task in
272 kernel mode. This saves memory access for each such access
273
cfdbc2e1
VG
274config ARC_STACK_NONEXEC
275 bool "Make stack non-executable"
276 default n
277 help
278 To disable the execute permissions of stack/heap of processes
279 which are enabled by default.
280
281config HZ
282 int "Timer Frequency"
283 default 100
284
285menuconfig ARC_DBG
286 bool "ARC debugging"
287 default y
288
289config ARC_DBG_TLB_PARANOIA
290 bool "Paranoia Checks in Low Level TLB Handlers"
291 depends on ARC_DBG
292 default n
293
294config ARC_DBG_TLB_MISS_COUNT
295 bool "Profile TLB Misses"
296 default n
297 select DEBUG_FS
298 depends on ARC_DBG
299 help
300 Counts number of I and D TLB Misses and exports them via Debugfs
301 The counters can be cleared via Debugfs as well
302
303config CMDLINE
304 string "Kernel command line to built-in"
305 default "print-fatal-signals=1"
306 help
307 The default command line which will be appended to the optional
308 u-boot provided command line (see below)
309
310config CMDLINE_UBOOT
311 bool "Support U-boot kernel command line passing"
312 default n
313 help
314 If you are using U-boot (www.denx.de) and wish to pass the kernel
315 command line from the U-boot environment to the Linux kernel then
316 switch this option on.
317 ARC U-boot will setup the cmdline in RAM/flash and set r2 to point
318 to it. kernel startup code will copy the string into cmdline buffer
319 and also append CONFIG_CMDLINE.
320
999159a5
VG
321config ARC_BUILTIN_DTB_NAME
322 string "Built in DTB"
323 help
324 Set the name of the DTB to embed in the vmlinux binary
325 Leaving it blank selects the minimal "skeleton" dtb
326
cfdbc2e1
VG
327source "kernel/Kconfig.preempt"
328
329endmenu # "ARC Architecture Configuration"
330
331source "mm/Kconfig"
332source "net/Kconfig"
333source "drivers/Kconfig"
334source "fs/Kconfig"
335source "arch/arc/Kconfig.debug"
336source "security/Kconfig"
337source "crypto/Kconfig"
338source "lib/Kconfig"