License cleanup: add SPDX GPL-2.0 license identifier to files with no license
[linux-2.6-block.git] / arch / alpha / kernel / setup.c
CommitLineData
b2441318 1// SPDX-License-Identifier: GPL-2.0
1da177e4
LT
2/*
3 * linux/arch/alpha/kernel/setup.c
4 *
5 * Copyright (C) 1995 Linus Torvalds
6 */
7
8/* 2.3.x bootmem, 1999 Andrea Arcangeli <andrea@suse.de> */
9
10/*
11 * Bootup setup stuff.
12 */
13
14#include <linux/sched.h>
15#include <linux/kernel.h>
16#include <linux/mm.h>
17#include <linux/stddef.h>
18#include <linux/unistd.h>
19#include <linux/ptrace.h>
20#include <linux/slab.h>
21#include <linux/user.h>
894673ee 22#include <linux/screen_info.h>
1da177e4 23#include <linux/delay.h>
1da177e4
LT
24#include <linux/mc146818rtc.h>
25#include <linux/console.h>
917b1f78 26#include <linux/cpu.h>
1da177e4
LT
27#include <linux/errno.h>
28#include <linux/init.h>
29#include <linux/string.h>
30#include <linux/ioport.h>
e5c6c8e4 31#include <linux/platform_device.h>
1da177e4
LT
32#include <linux/bootmem.h>
33#include <linux/pci.h>
34#include <linux/seq_file.h>
35#include <linux/root_dev.h>
36#include <linux/initrd.h>
37#include <linux/eisa.h>
22a9835c 38#include <linux/pfn.h>
1da177e4
LT
39#ifdef CONFIG_MAGIC_SYSRQ
40#include <linux/sysrq.h>
41#include <linux/reboot.h>
42#endif
43#include <linux/notifier.h>
44#include <asm/setup.h>
45#include <asm/io.h>
74fd1b68 46#include <linux/log2.h>
00cd1176 47#include <linux/export.h>
1da177e4 48
e041c683 49extern struct atomic_notifier_head panic_notifier_list;
1da177e4
LT
50static int alpha_panic_event(struct notifier_block *, unsigned long, void *);
51static struct notifier_block alpha_panic_block = {
52 alpha_panic_event,
53 NULL,
54 INT_MAX /* try to do it first */
55};
56
7c0f6ba6 57#include <linux/uaccess.h>
1da177e4 58#include <asm/pgtable.h>
1da177e4
LT
59#include <asm/hwrpb.h>
60#include <asm/dma.h>
1da177e4
LT
61#include <asm/mmu_context.h>
62#include <asm/console.h>
63
64#include "proto.h"
65#include "pci_impl.h"
66
67
68struct hwrpb_struct *hwrpb;
cff52daf 69EXPORT_SYMBOL(hwrpb);
1da177e4
LT
70unsigned long srm_hae;
71
72int alpha_l1i_cacheshape;
73int alpha_l1d_cacheshape;
74int alpha_l2_cacheshape;
75int alpha_l3_cacheshape;
76
77#ifdef CONFIG_VERBOSE_MCHECK
78/* 0=minimum, 1=verbose, 2=all */
79/* These can be overridden via the command line, ie "verbose_mcheck=2") */
80unsigned long alpha_verbose_mcheck = CONFIG_VERBOSE_MCHECK_ON;
81#endif
82
2258a5bb
RR
83#ifdef CONFIG_NUMA
84struct cpumask node_to_cpumask_map[MAX_NUMNODES] __read_mostly;
85EXPORT_SYMBOL(node_to_cpumask_map);
86#endif
87
1da177e4
LT
88/* Which processor we booted from. */
89int boot_cpuid;
90
91/*
92 * Using SRM callbacks for initial console output. This works from
93 * setup_arch() time through the end of time_init(), as those places
94 * are under our (Alpha) control.
95
96 * "srmcons" specified in the boot command arguments allows us to
97 * see kernel messages during the period of time before the true
98 * console device is "registered" during console_init().
99 * As of this version (2.5.59), console_init() will call
100 * disable_early_printk() as the last action before initializing
101 * the console drivers. That's the last possible time srmcons can be
102 * unregistered without interfering with console behavior.
103 *
104 * By default, OFF; set it with a bootcommand arg of "srmcons" or
105 * "console=srm". The meaning of these two args is:
106 * "srmcons" - early callback prints
107 * "console=srm" - full callback based console, including early prints
108 */
109int srmcons_output = 0;
110
111/* Enforce a memory size limit; useful for testing. By default, none. */
112unsigned long mem_size_limit = 0;
113
114/* Set AGP GART window size (0 means disabled). */
115unsigned long alpha_agpgart_size = DEFAULT_AGP_APER_SIZE;
116
117#ifdef CONFIG_ALPHA_GENERIC
118struct alpha_machine_vector alpha_mv;
00fc0e0d 119EXPORT_SYMBOL(alpha_mv);
994dcf70
RH
120#endif
121
122#ifndef alpha_using_srm
1da177e4 123int alpha_using_srm;
cff52daf 124EXPORT_SYMBOL(alpha_using_srm);
1da177e4
LT
125#endif
126
994dcf70
RH
127#ifndef alpha_using_qemu
128int alpha_using_qemu;
129#endif
130
1da177e4
LT
131static struct alpha_machine_vector *get_sysvec(unsigned long, unsigned long,
132 unsigned long);
133static struct alpha_machine_vector *get_sysvec_byname(const char *);
134static void get_sysnames(unsigned long, unsigned long, unsigned long,
135 char **, char **);
136static void determine_cpu_caches (unsigned int);
137
3c253ca0 138static char __initdata command_line[COMMAND_LINE_SIZE];
1da177e4
LT
139
140/*
141 * The format of "screen_info" is strange, and due to early
142 * i386-setup code. This is just enough to make the console
143 * code think we're on a VGA color display.
144 */
145
146struct screen_info screen_info = {
147 .orig_x = 0,
148 .orig_y = 25,
149 .orig_video_cols = 80,
150 .orig_video_lines = 25,
151 .orig_video_isVGA = 1,
152 .orig_video_points = 16
153};
154
cff52daf
AV
155EXPORT_SYMBOL(screen_info);
156
1da177e4
LT
157/*
158 * The direct map I/O window, if any. This should be the same
159 * for all busses, since it's used by virt_to_bus.
160 */
161
162unsigned long __direct_map_base;
163unsigned long __direct_map_size;
cff52daf
AV
164EXPORT_SYMBOL(__direct_map_base);
165EXPORT_SYMBOL(__direct_map_size);
1da177e4
LT
166
167/*
168 * Declare all of the machine vectors.
169 */
170
171/* GCC 2.7.2 (on alpha at least) is lame. It does not support either
172 __attribute__((weak)) or #pragma weak. Bypass it and talk directly
173 to the assembler. */
174
175#define WEAK(X) \
176 extern struct alpha_machine_vector X; \
177 asm(".weak "#X)
178
179WEAK(alcor_mv);
180WEAK(alphabook1_mv);
181WEAK(avanti_mv);
182WEAK(cabriolet_mv);
183WEAK(clipper_mv);
184WEAK(dp264_mv);
185WEAK(eb164_mv);
186WEAK(eb64p_mv);
187WEAK(eb66_mv);
188WEAK(eb66p_mv);
189WEAK(eiger_mv);
190WEAK(jensen_mv);
191WEAK(lx164_mv);
192WEAK(lynx_mv);
193WEAK(marvel_ev7_mv);
194WEAK(miata_mv);
195WEAK(mikasa_mv);
196WEAK(mikasa_primo_mv);
197WEAK(monet_mv);
198WEAK(nautilus_mv);
199WEAK(noname_mv);
200WEAK(noritake_mv);
201WEAK(noritake_primo_mv);
202WEAK(p2k_mv);
203WEAK(pc164_mv);
204WEAK(privateer_mv);
205WEAK(rawhide_mv);
206WEAK(ruffian_mv);
207WEAK(rx164_mv);
208WEAK(sable_mv);
209WEAK(sable_gamma_mv);
210WEAK(shark_mv);
211WEAK(sx164_mv);
212WEAK(takara_mv);
213WEAK(titan_mv);
214WEAK(webbrick_mv);
215WEAK(wildfire_mv);
216WEAK(xl_mv);
217WEAK(xlt_mv);
218
219#undef WEAK
220
221/*
222 * I/O resources inherited from PeeCees. Except for perhaps the
223 * turbochannel alphas, everyone has these on some sort of SuperIO chip.
224 *
225 * ??? If this becomes less standard, move the struct out into the
226 * machine vector.
227 */
228
229static void __init
230reserve_std_resources(void)
231{
232 static struct resource standard_io_resources[] = {
233 { .name = "rtc", .start = -1, .end = -1 },
234 { .name = "dma1", .start = 0x00, .end = 0x1f },
235 { .name = "pic1", .start = 0x20, .end = 0x3f },
236 { .name = "timer", .start = 0x40, .end = 0x5f },
237 { .name = "keyboard", .start = 0x60, .end = 0x6f },
238 { .name = "dma page reg", .start = 0x80, .end = 0x8f },
239 { .name = "pic2", .start = 0xa0, .end = 0xbf },
240 { .name = "dma2", .start = 0xc0, .end = 0xdf },
241 };
242
243 struct resource *io = &ioport_resource;
244 size_t i;
245
246 if (hose_head) {
247 struct pci_controller *hose;
248 for (hose = hose_head; hose; hose = hose->next)
249 if (hose->index == 0) {
250 io = hose->io_space;
251 break;
252 }
253 }
254
255 /* Fix up for the Jensen's queer RTC placement. */
256 standard_io_resources[0].start = RTC_PORT(0);
257 standard_io_resources[0].end = RTC_PORT(0) + 0x10;
258
25c8716c 259 for (i = 0; i < ARRAY_SIZE(standard_io_resources); ++i)
1da177e4
LT
260 request_resource(io, standard_io_resources+i);
261}
262
1da177e4 263#define PFN_MAX PFN_DOWN(0x80000000)
fb26b3e6
RK
264#define for_each_mem_cluster(memdesc, _cluster, i) \
265 for ((_cluster) = (memdesc)->cluster, (i) = 0; \
266 (i) < (memdesc)->numclusters; (i)++, (_cluster)++)
1da177e4
LT
267
268static unsigned long __init
269get_mem_size_limit(char *s)
270{
271 unsigned long end = 0;
272 char *from = s;
273
274 end = simple_strtoul(from, &from, 0);
275 if ( *from == 'K' || *from == 'k' ) {
276 end = end << 10;
277 from++;
278 } else if ( *from == 'M' || *from == 'm' ) {
279 end = end << 20;
280 from++;
281 } else if ( *from == 'G' || *from == 'g' ) {
282 end = end << 30;
283 from++;
284 }
285 return end >> PAGE_SHIFT; /* Return the PFN of the limit. */
286}
287
288#ifdef CONFIG_BLK_DEV_INITRD
289void * __init
290move_initrd(unsigned long mem_limit)
291{
292 void *start;
293 unsigned long size;
294
295 size = initrd_end - initrd_start;
296 start = __alloc_bootmem(PAGE_ALIGN(size), PAGE_SIZE, 0);
297 if (!start || __pa(start) + size > mem_limit) {
298 initrd_start = initrd_end = 0;
299 return NULL;
300 }
301 memmove(start, (void *)initrd_start, size);
302 initrd_start = (unsigned long)start;
303 initrd_end = initrd_start + size;
304 printk("initrd moved to %p\n", start);
305 return start;
306}
307#endif
308
309#ifndef CONFIG_DISCONTIGMEM
310static void __init
311setup_memory(void *kernel_end)
312{
313 struct memclust_struct * cluster;
314 struct memdesc_struct * memdesc;
315 unsigned long start_kernel_pfn, end_kernel_pfn;
316 unsigned long bootmap_size, bootmap_pages, bootmap_start;
317 unsigned long start, end;
318 unsigned long i;
319
320 /* Find free clusters, and init and free the bootmem accordingly. */
321 memdesc = (struct memdesc_struct *)
322 (hwrpb->mddt_offset + (unsigned long) hwrpb);
323
324 for_each_mem_cluster(memdesc, cluster, i) {
325 printk("memcluster %lu, usage %01lx, start %8lu, end %8lu\n",
326 i, cluster->usage, cluster->start_pfn,
327 cluster->start_pfn + cluster->numpages);
328
329 /* Bit 0 is console/PALcode reserved. Bit 1 is
330 non-volatile memory -- we might want to mark
331 this for later. */
332 if (cluster->usage & 3)
333 continue;
334
335 end = cluster->start_pfn + cluster->numpages;
336 if (end > max_low_pfn)
337 max_low_pfn = end;
338 }
339
340 /*
341 * Except for the NUMA systems (wildfire, marvel) all of the
342 * Alpha systems we run on support 32GB of memory or less.
343 * Since the NUMA systems introduce large holes in memory addressing,
344 * we can get into a situation where there is not enough contiguous
345 * memory for the memory map.
346 *
347 * Limit memory to the first 32GB to limit the NUMA systems to
348 * memory on their first node (wildfire) or 2 (marvel) to avoid
349 * not being able to produce the memory map. In order to access
350 * all of the memory on the NUMA systems, build with discontiguous
351 * memory support.
352 *
353 * If the user specified a memory limit, let that memory limit stand.
354 */
355 if (!mem_size_limit)
356 mem_size_limit = (32ul * 1024 * 1024 * 1024) >> PAGE_SHIFT;
357
358 if (mem_size_limit && max_low_pfn >= mem_size_limit)
359 {
360 printk("setup: forcing memory size to %ldK (from %ldK).\n",
361 mem_size_limit << (PAGE_SHIFT - 10),
362 max_low_pfn << (PAGE_SHIFT - 10));
363 max_low_pfn = mem_size_limit;
364 }
365
366 /* Find the bounds of kernel memory. */
367 start_kernel_pfn = PFN_DOWN(KERNEL_START_PHYS);
368 end_kernel_pfn = PFN_UP(virt_to_phys(kernel_end));
369 bootmap_start = -1;
370
371 try_again:
372 if (max_low_pfn <= end_kernel_pfn)
373 panic("not enough memory to boot");
374
375 /* We need to know how many physically contiguous pages
376 we'll need for the bootmap. */
377 bootmap_pages = bootmem_bootmap_pages(max_low_pfn);
378
379 /* Now find a good region where to allocate the bootmap. */
380 for_each_mem_cluster(memdesc, cluster, i) {
381 if (cluster->usage & 3)
382 continue;
383
384 start = cluster->start_pfn;
385 end = start + cluster->numpages;
386 if (start >= max_low_pfn)
387 continue;
388 if (end > max_low_pfn)
389 end = max_low_pfn;
390 if (start < start_kernel_pfn) {
391 if (end > end_kernel_pfn
392 && end - end_kernel_pfn >= bootmap_pages) {
393 bootmap_start = end_kernel_pfn;
394 break;
395 } else if (end > start_kernel_pfn)
396 end = start_kernel_pfn;
397 } else if (start < end_kernel_pfn)
398 start = end_kernel_pfn;
399 if (end - start >= bootmap_pages) {
400 bootmap_start = start;
401 break;
402 }
403 }
404
405 if (bootmap_start == ~0UL) {
406 max_low_pfn >>= 1;
407 goto try_again;
408 }
409
410 /* Allocate the bootmap and mark the whole MM as reserved. */
411 bootmap_size = init_bootmem(bootmap_start, max_low_pfn);
412
413 /* Mark the free regions. */
414 for_each_mem_cluster(memdesc, cluster, i) {
415 if (cluster->usage & 3)
416 continue;
417
418 start = cluster->start_pfn;
419 end = cluster->start_pfn + cluster->numpages;
420 if (start >= max_low_pfn)
421 continue;
422 if (end > max_low_pfn)
423 end = max_low_pfn;
424 if (start < start_kernel_pfn) {
425 if (end > end_kernel_pfn) {
426 free_bootmem(PFN_PHYS(start),
427 (PFN_PHYS(start_kernel_pfn)
428 - PFN_PHYS(start)));
429 printk("freeing pages %ld:%ld\n",
430 start, start_kernel_pfn);
431 start = end_kernel_pfn;
432 } else if (end > start_kernel_pfn)
433 end = start_kernel_pfn;
434 } else if (start < end_kernel_pfn)
435 start = end_kernel_pfn;
436 if (start >= end)
437 continue;
438
439 free_bootmem(PFN_PHYS(start), PFN_PHYS(end) - PFN_PHYS(start));
440 printk("freeing pages %ld:%ld\n", start, end);
441 }
442
443 /* Reserve the bootmap memory. */
72a7fe39
BW
444 reserve_bootmem(PFN_PHYS(bootmap_start), bootmap_size,
445 BOOTMEM_DEFAULT);
1da177e4
LT
446 printk("reserving pages %ld:%ld\n", bootmap_start, bootmap_start+PFN_UP(bootmap_size));
447
448#ifdef CONFIG_BLK_DEV_INITRD
449 initrd_start = INITRD_START;
450 if (initrd_start) {
451 initrd_end = initrd_start+INITRD_SIZE;
452 printk("Initial ramdisk at: 0x%p (%lu bytes)\n",
453 (void *) initrd_start, INITRD_SIZE);
454
455 if ((void *)initrd_end > phys_to_virt(PFN_PHYS(max_low_pfn))) {
456 if (!move_initrd(PFN_PHYS(max_low_pfn)))
457 printk("initrd extends beyond end of memory "
458 "(0x%08lx > 0x%p)\ndisabling initrd\n",
459 initrd_end,
460 phys_to_virt(PFN_PHYS(max_low_pfn)));
461 } else {
462 reserve_bootmem(virt_to_phys((void *)initrd_start),
72a7fe39 463 INITRD_SIZE, BOOTMEM_DEFAULT);
1da177e4
LT
464 }
465 }
466#endif /* CONFIG_BLK_DEV_INITRD */
467}
468#else
469extern void setup_memory(void *);
470#endif /* !CONFIG_DISCONTIGMEM */
471
472int __init
473page_is_ram(unsigned long pfn)
474{
475 struct memclust_struct * cluster;
476 struct memdesc_struct * memdesc;
477 unsigned long i;
478
479 memdesc = (struct memdesc_struct *)
480 (hwrpb->mddt_offset + (unsigned long) hwrpb);
481 for_each_mem_cluster(memdesc, cluster, i)
482 {
483 if (pfn >= cluster->start_pfn &&
484 pfn < cluster->start_pfn + cluster->numpages) {
485 return (cluster->usage & 3) ? 0 : 1;
486 }
487 }
488
489 return 0;
490}
491
917b1f78
BU
492static int __init
493register_cpus(void)
494{
495 int i;
496
497 for_each_possible_cpu(i) {
498 struct cpu *p = kzalloc(sizeof(*p), GFP_KERNEL);
499 if (!p)
500 return -ENOMEM;
76b67ed9 501 register_cpu(p, i);
917b1f78
BU
502 }
503 return 0;
504}
505
506arch_initcall(register_cpus);
507
1da177e4
LT
508void __init
509setup_arch(char **cmdline_p)
510{
511 extern char _end[];
512
513 struct alpha_machine_vector *vec = NULL;
514 struct percpu_struct *cpu;
515 char *type_name, *var_name, *p;
516 void *kernel_end = _end; /* end of kernel */
517 char *args = command_line;
518
519 hwrpb = (struct hwrpb_struct*) __va(INIT_HWRPB->phys_addr);
520 boot_cpuid = hard_smp_processor_id();
521
522 /*
523 * Pre-process the system type to make sure it will be valid.
524 *
525 * This may restore real CABRIO and EB66+ family names, ie
526 * EB64+ and EB66.
527 *
528 * Oh, and "white box" AS800 (aka DIGITAL Server 3000 series)
529 * and AS1200 (DIGITAL Server 5000 series) have the type as
530 * the negative of the real one.
531 */
532 if ((long)hwrpb->sys_type < 0) {
533 hwrpb->sys_type = -((long)hwrpb->sys_type);
534 hwrpb_update_checksum(hwrpb);
535 }
536
537 /* Register a call for panic conditions. */
e041c683
AS
538 atomic_notifier_chain_register(&panic_notifier_list,
539 &alpha_panic_block);
1da177e4 540
994dcf70 541#ifndef alpha_using_srm
1da177e4
LT
542 /* Assume that we've booted from SRM if we haven't booted from MILO.
543 Detect the later by looking for "MILO" in the system serial nr. */
544 alpha_using_srm = strncmp((const char *)hwrpb->ssn, "MILO", 4) != 0;
545#endif
994dcf70
RH
546#ifndef alpha_using_qemu
547 /* Similarly, look for QEMU. */
548 alpha_using_qemu = strstr((const char *)hwrpb->ssn, "QEMU") != 0;
549#endif
1da177e4
LT
550
551 /* If we are using SRM, we want to allow callbacks
552 as early as possible, so do this NOW, and then
553 they should work immediately thereafter.
554 */
555 kernel_end = callback_init(kernel_end);
556
557 /*
558 * Locate the command line.
559 */
560 /* Hack for Jensen... since we're restricted to 8 or 16 chars for
561 boot flags depending on the boot mode, we need some shorthand.
562 This should do for installation. */
563 if (strcmp(COMMAND_LINE, "INSTALL") == 0) {
564 strlcpy(command_line, "root=/dev/fd0 load_ramdisk=1", sizeof command_line);
565 } else {
566 strlcpy(command_line, COMMAND_LINE, sizeof command_line);
567 }
3c253ca0 568 strcpy(boot_command_line, command_line);
1da177e4
LT
569 *cmdline_p = command_line;
570
571 /*
572 * Process command-line arguments.
573 */
574 while ((p = strsep(&args, " \t")) != NULL) {
575 if (!*p) continue;
576 if (strncmp(p, "alpha_mv=", 9) == 0) {
577 vec = get_sysvec_byname(p+9);
578 continue;
579 }
580 if (strncmp(p, "cycle=", 6) == 0) {
581 est_cycle_freq = simple_strtol(p+6, NULL, 0);
582 continue;
583 }
584 if (strncmp(p, "mem=", 4) == 0) {
585 mem_size_limit = get_mem_size_limit(p+4);
586 continue;
587 }
588 if (strncmp(p, "srmcons", 7) == 0) {
589 srmcons_output |= 1;
590 continue;
591 }
592 if (strncmp(p, "console=srm", 11) == 0) {
593 srmcons_output |= 2;
594 continue;
595 }
596 if (strncmp(p, "gartsize=", 9) == 0) {
597 alpha_agpgart_size =
598 get_mem_size_limit(p+9) << PAGE_SHIFT;
599 continue;
600 }
601#ifdef CONFIG_VERBOSE_MCHECK
602 if (strncmp(p, "verbose_mcheck=", 15) == 0) {
603 alpha_verbose_mcheck = simple_strtol(p+15, NULL, 0);
604 continue;
605 }
606#endif
607 }
608
609 /* Replace the command line, now that we've killed it with strsep. */
3c253ca0 610 strcpy(command_line, boot_command_line);
1da177e4
LT
611
612 /* If we want SRM console printk echoing early, do it now. */
613 if (alpha_using_srm && srmcons_output) {
614 register_srm_console();
615
616 /*
617 * If "console=srm" was specified, clear the srmcons_output
618 * flag now so that time.c won't unregister_srm_console
619 */
620 if (srmcons_output & 2)
621 srmcons_output = 0;
622 }
623
624#ifdef CONFIG_MAGIC_SYSRQ
625 /* If we're using SRM, make sysrq-b halt back to the prom,
626 not auto-reboot. */
627 if (alpha_using_srm) {
628 struct sysrq_key_op *op = __sysrq_get_key_op('b');
629 op->handler = (void *) machine_halt;
630 }
631#endif
632
633 /*
634 * Identify and reconfigure for the current system.
635 */
636 cpu = (struct percpu_struct*)((char*)hwrpb + hwrpb->processor_offset);
637
638 get_sysnames(hwrpb->sys_type, hwrpb->sys_variation,
639 cpu->type, &type_name, &var_name);
640 if (*var_name == '0')
641 var_name = "";
642
643 if (!vec) {
644 vec = get_sysvec(hwrpb->sys_type, hwrpb->sys_variation,
645 cpu->type);
646 }
647
648 if (!vec) {
649 panic("Unsupported system type: %s%s%s (%ld %ld)\n",
650 type_name, (*var_name ? " variation " : ""), var_name,
651 hwrpb->sys_type, hwrpb->sys_variation);
652 }
653 if (vec != &alpha_mv) {
654 alpha_mv = *vec;
655 }
656
657 printk("Booting "
658#ifdef CONFIG_ALPHA_GENERIC
659 "GENERIC "
660#endif
661 "on %s%s%s using machine vector %s from %s\n",
662 type_name, (*var_name ? " variation " : ""),
663 var_name, alpha_mv.vector_name,
664 (alpha_using_srm ? "SRM" : "MILO"));
665
666 printk("Major Options: "
667#ifdef CONFIG_SMP
668 "SMP "
669#endif
670#ifdef CONFIG_ALPHA_EV56
671 "EV56 "
672#endif
673#ifdef CONFIG_ALPHA_EV67
674 "EV67 "
675#endif
676#ifdef CONFIG_ALPHA_LEGACY_START_ADDRESS
677 "LEGACY_START "
678#endif
679#ifdef CONFIG_VERBOSE_MCHECK
680 "VERBOSE_MCHECK "
681#endif
682
683#ifdef CONFIG_DISCONTIGMEM
684 "DISCONTIGMEM "
685#ifdef CONFIG_NUMA
686 "NUMA "
687#endif
688#endif
689
690#ifdef CONFIG_DEBUG_SPINLOCK
691 "DEBUG_SPINLOCK "
692#endif
693#ifdef CONFIG_MAGIC_SYSRQ
694 "MAGIC_SYSRQ "
695#endif
696 "\n");
697
698 printk("Command line: %s\n", command_line);
699
700 /*
701 * Sync up the HAE.
702 * Save the SRM's current value for restoration.
703 */
704 srm_hae = *alpha_mv.hae_register;
705 __set_hae(alpha_mv.hae_cache);
706
707 /* Reset enable correctable error reports. */
708 wrmces(0x7);
709
710 /* Find our memory. */
711 setup_memory(kernel_end);
712
713 /* First guess at cpu cache sizes. Do this before init_arch. */
714 determine_cpu_caches(cpu->type);
715
716 /* Initialize the machine. Usually has to do with setting up
717 DMA windows and the like. */
718 if (alpha_mv.init_arch)
719 alpha_mv.init_arch();
720
721 /* Reserve standard resources. */
722 reserve_std_resources();
723
724 /*
725 * Give us a default console. TGA users will see nothing until
726 * chr_dev_init is called, rather late in the boot sequence.
727 */
728
729#ifdef CONFIG_VT
730#if defined(CONFIG_VGA_CONSOLE)
731 conswitchp = &vga_con;
732#elif defined(CONFIG_DUMMY_CONSOLE)
733 conswitchp = &dummy_con;
734#endif
735#endif
736
737 /* Default root filesystem to sda2. */
738 ROOT_DEV = Root_SDA2;
739
740#ifdef CONFIG_EISA
741 /* FIXME: only set this when we actually have EISA in this box? */
742 EISA_bus = 1;
743#endif
744
745 /*
746 * Check ASN in HWRPB for validity, report if bad.
747 * FIXME: how was this failing? Should we trust it instead,
748 * and copy the value into alpha_mv.max_asn?
749 */
750
751 if (hwrpb->max_asn != MAX_ASN) {
752 printk("Max ASN from HWRPB is bad (0x%lx)\n", hwrpb->max_asn);
753 }
754
755 /*
756 * Identify the flock of penguins.
757 */
758
759#ifdef CONFIG_SMP
760 setup_smp();
761#endif
762 paging_init();
763}
764
1da177e4
LT
765static char sys_unknown[] = "Unknown";
766static char systype_names[][16] = {
767 "0",
768 "ADU", "Cobra", "Ruby", "Flamingo", "Mannequin", "Jensen",
769 "Pelican", "Morgan", "Sable", "Medulla", "Noname",
770 "Turbolaser", "Avanti", "Mustang", "Alcor", "Tradewind",
771 "Mikasa", "EB64", "EB66", "EB64+", "AlphaBook1",
772 "Rawhide", "K2", "Lynx", "XL", "EB164", "Noritake",
773 "Cortex", "29", "Miata", "XXM", "Takara", "Yukon",
774 "Tsunami", "Wildfire", "CUSCO", "Eiger", "Titan", "Marvel"
775};
776
777static char unofficial_names[][8] = {"100", "Ruffian"};
778
779static char api_names[][16] = {"200", "Nautilus"};
780
781static char eb164_names[][8] = {"EB164", "PC164", "LX164", "SX164", "RX164"};
782static int eb164_indices[] = {0,0,0,1,1,1,1,1,2,2,2,2,3,3,3,3,4};
783
784static char alcor_names[][16] = {"Alcor", "Maverick", "Bret"};
785static int alcor_indices[] = {0,0,0,1,1,1,0,0,0,0,0,0,2,2,2,2,2,2};
786
787static char eb64p_names[][16] = {"EB64+", "Cabriolet", "AlphaPCI64"};
788static int eb64p_indices[] = {0,0,1,2};
789
790static char eb66_names[][8] = {"EB66", "EB66+"};
791static int eb66_indices[] = {0,0,1};
792
793static char marvel_names[][16] = {
794 "Marvel/EV7"
795};
796static int marvel_indices[] = { 0 };
797
798static char rawhide_names[][16] = {
799 "Dodge", "Wrangler", "Durango", "Tincup", "DaVinci"
800};
801static int rawhide_indices[] = {0,0,0,1,1,2,2,3,3,4,4};
802
803static char titan_names[][16] = {
804 "DEFAULT", "Privateer", "Falcon", "Granite"
805};
806static int titan_indices[] = {0,1,2,2,3};
807
808static char tsunami_names[][16] = {
809 "0", "DP264", "Warhol", "Windjammer", "Monet", "Clipper",
810 "Goldrush", "Webbrick", "Catamaran", "Brisbane", "Melbourne",
811 "Flying Clipper", "Shark"
812};
813static int tsunami_indices[] = {0,1,2,3,4,5,6,7,8,9,10,11,12};
814
815static struct alpha_machine_vector * __init
816get_sysvec(unsigned long type, unsigned long variation, unsigned long cpu)
817{
818 static struct alpha_machine_vector *systype_vecs[] __initdata =
819 {
820 NULL, /* 0 */
821 NULL, /* ADU */
822 NULL, /* Cobra */
823 NULL, /* Ruby */
824 NULL, /* Flamingo */
825 NULL, /* Mannequin */
826 &jensen_mv,
827 NULL, /* Pelican */
828 NULL, /* Morgan */
829 NULL, /* Sable -- see below. */
830 NULL, /* Medulla */
831 &noname_mv,
832 NULL, /* Turbolaser */
833 &avanti_mv,
834 NULL, /* Mustang */
835 NULL, /* Alcor, Bret, Maverick. HWRPB inaccurate? */
836 NULL, /* Tradewind */
837 NULL, /* Mikasa -- see below. */
838 NULL, /* EB64 */
839 NULL, /* EB66 -- see variation. */
840 NULL, /* EB64+ -- see variation. */
841 &alphabook1_mv,
842 &rawhide_mv,
843 NULL, /* K2 */
844 &lynx_mv, /* Lynx */
845 &xl_mv,
846 NULL, /* EB164 -- see variation. */
847 NULL, /* Noritake -- see below. */
848 NULL, /* Cortex */
849 NULL, /* 29 */
850 &miata_mv,
851 NULL, /* XXM */
852 &takara_mv,
853 NULL, /* Yukon */
854 NULL, /* Tsunami -- see variation. */
855 &wildfire_mv, /* Wildfire */
856 NULL, /* CUSCO */
857 &eiger_mv, /* Eiger */
858 NULL, /* Titan */
859 NULL, /* Marvel */
860 };
861
862 static struct alpha_machine_vector *unofficial_vecs[] __initdata =
863 {
864 NULL, /* 100 */
865 &ruffian_mv,
866 };
867
868 static struct alpha_machine_vector *api_vecs[] __initdata =
869 {
870 NULL, /* 200 */
871 &nautilus_mv,
872 };
873
874 static struct alpha_machine_vector *alcor_vecs[] __initdata =
875 {
876 &alcor_mv, &xlt_mv, &xlt_mv
877 };
878
879 static struct alpha_machine_vector *eb164_vecs[] __initdata =
880 {
881 &eb164_mv, &pc164_mv, &lx164_mv, &sx164_mv, &rx164_mv
882 };
883
884 static struct alpha_machine_vector *eb64p_vecs[] __initdata =
885 {
886 &eb64p_mv,
887 &cabriolet_mv,
888 &cabriolet_mv /* AlphaPCI64 */
889 };
890
891 static struct alpha_machine_vector *eb66_vecs[] __initdata =
892 {
893 &eb66_mv,
894 &eb66p_mv
895 };
896
897 static struct alpha_machine_vector *marvel_vecs[] __initdata =
898 {
899 &marvel_ev7_mv,
900 };
901
902 static struct alpha_machine_vector *titan_vecs[] __initdata =
903 {
904 &titan_mv, /* default */
905 &privateer_mv, /* privateer */
906 &titan_mv, /* falcon */
907 &privateer_mv, /* granite */
908 };
909
910 static struct alpha_machine_vector *tsunami_vecs[] __initdata =
911 {
912 NULL,
913 &dp264_mv, /* dp264 */
914 &dp264_mv, /* warhol */
915 &dp264_mv, /* windjammer */
916 &monet_mv, /* monet */
917 &clipper_mv, /* clipper */
918 &dp264_mv, /* goldrush */
919 &webbrick_mv, /* webbrick */
920 &dp264_mv, /* catamaran */
921 NULL, /* brisbane? */
922 NULL, /* melbourne? */
923 NULL, /* flying clipper? */
924 &shark_mv, /* shark */
925 };
926
927 /* ??? Do we need to distinguish between Rawhides? */
928
929 struct alpha_machine_vector *vec;
930
931 /* Search the system tables first... */
932 vec = NULL;
25c8716c 933 if (type < ARRAY_SIZE(systype_vecs)) {
1da177e4
LT
934 vec = systype_vecs[type];
935 } else if ((type > ST_API_BIAS) &&
25c8716c 936 (type - ST_API_BIAS) < ARRAY_SIZE(api_vecs)) {
1da177e4
LT
937 vec = api_vecs[type - ST_API_BIAS];
938 } else if ((type > ST_UNOFFICIAL_BIAS) &&
25c8716c 939 (type - ST_UNOFFICIAL_BIAS) < ARRAY_SIZE(unofficial_vecs)) {
1da177e4
LT
940 vec = unofficial_vecs[type - ST_UNOFFICIAL_BIAS];
941 }
942
943 /* If we've not found one, try for a variation. */
944
945 if (!vec) {
946 /* Member ID is a bit-field. */
947 unsigned long member = (variation >> 10) & 0x3f;
948
949 cpu &= 0xffffffff; /* make it usable */
950
951 switch (type) {
952 case ST_DEC_ALCOR:
25c8716c 953 if (member < ARRAY_SIZE(alcor_indices))
1da177e4
LT
954 vec = alcor_vecs[alcor_indices[member]];
955 break;
956 case ST_DEC_EB164:
25c8716c 957 if (member < ARRAY_SIZE(eb164_indices))
1da177e4
LT
958 vec = eb164_vecs[eb164_indices[member]];
959 /* PC164 may show as EB164 variation with EV56 CPU,
960 but, since no true EB164 had anything but EV5... */
961 if (vec == &eb164_mv && cpu == EV56_CPU)
962 vec = &pc164_mv;
963 break;
964 case ST_DEC_EB64P:
25c8716c 965 if (member < ARRAY_SIZE(eb64p_indices))
1da177e4
LT
966 vec = eb64p_vecs[eb64p_indices[member]];
967 break;
968 case ST_DEC_EB66:
25c8716c 969 if (member < ARRAY_SIZE(eb66_indices))
1da177e4
LT
970 vec = eb66_vecs[eb66_indices[member]];
971 break;
972 case ST_DEC_MARVEL:
25c8716c 973 if (member < ARRAY_SIZE(marvel_indices))
1da177e4
LT
974 vec = marvel_vecs[marvel_indices[member]];
975 break;
976 case ST_DEC_TITAN:
977 vec = titan_vecs[0]; /* default */
25c8716c 978 if (member < ARRAY_SIZE(titan_indices))
1da177e4
LT
979 vec = titan_vecs[titan_indices[member]];
980 break;
981 case ST_DEC_TSUNAMI:
25c8716c 982 if (member < ARRAY_SIZE(tsunami_indices))
1da177e4
LT
983 vec = tsunami_vecs[tsunami_indices[member]];
984 break;
985 case ST_DEC_1000:
986 if (cpu == EV5_CPU || cpu == EV56_CPU)
987 vec = &mikasa_primo_mv;
988 else
989 vec = &mikasa_mv;
990 break;
991 case ST_DEC_NORITAKE:
992 if (cpu == EV5_CPU || cpu == EV56_CPU)
993 vec = &noritake_primo_mv;
994 else
995 vec = &noritake_mv;
996 break;
997 case ST_DEC_2100_A500:
998 if (cpu == EV5_CPU || cpu == EV56_CPU)
999 vec = &sable_gamma_mv;
1000 else
1001 vec = &sable_mv;
1002 break;
1003 }
1004 }
1005 return vec;
1006}
1007
1008static struct alpha_machine_vector * __init
1009get_sysvec_byname(const char *name)
1010{
1011 static struct alpha_machine_vector *all_vecs[] __initdata =
1012 {
1013 &alcor_mv,
1014 &alphabook1_mv,
1015 &avanti_mv,
1016 &cabriolet_mv,
1017 &clipper_mv,
1018 &dp264_mv,
1019 &eb164_mv,
1020 &eb64p_mv,
1021 &eb66_mv,
1022 &eb66p_mv,
1023 &eiger_mv,
1024 &jensen_mv,
1025 &lx164_mv,
1026 &lynx_mv,
1027 &miata_mv,
1028 &mikasa_mv,
1029 &mikasa_primo_mv,
1030 &monet_mv,
1031 &nautilus_mv,
1032 &noname_mv,
1033 &noritake_mv,
1034 &noritake_primo_mv,
1035 &p2k_mv,
1036 &pc164_mv,
1037 &privateer_mv,
1038 &rawhide_mv,
1039 &ruffian_mv,
1040 &rx164_mv,
1041 &sable_mv,
1042 &sable_gamma_mv,
1043 &shark_mv,
1044 &sx164_mv,
1045 &takara_mv,
1046 &webbrick_mv,
1047 &wildfire_mv,
1048 &xl_mv,
1049 &xlt_mv
1050 };
1051
1052 size_t i;
1053
25c8716c 1054 for (i = 0; i < ARRAY_SIZE(all_vecs); ++i) {
1da177e4
LT
1055 struct alpha_machine_vector *mv = all_vecs[i];
1056 if (strcasecmp(mv->vector_name, name) == 0)
1057 return mv;
1058 }
1059 return NULL;
1060}
1061
1062static void
1063get_sysnames(unsigned long type, unsigned long variation, unsigned long cpu,
1064 char **type_name, char **variation_name)
1065{
1066 unsigned long member;
1067
1068 /* If not in the tables, make it UNKNOWN,
1069 else set type name to family */
25c8716c 1070 if (type < ARRAY_SIZE(systype_names)) {
1da177e4
LT
1071 *type_name = systype_names[type];
1072 } else if ((type > ST_API_BIAS) &&
25c8716c 1073 (type - ST_API_BIAS) < ARRAY_SIZE(api_names)) {
1da177e4
LT
1074 *type_name = api_names[type - ST_API_BIAS];
1075 } else if ((type > ST_UNOFFICIAL_BIAS) &&
25c8716c 1076 (type - ST_UNOFFICIAL_BIAS) < ARRAY_SIZE(unofficial_names)) {
1da177e4
LT
1077 *type_name = unofficial_names[type - ST_UNOFFICIAL_BIAS];
1078 } else {
1079 *type_name = sys_unknown;
1080 *variation_name = sys_unknown;
1081 return;
1082 }
1083
1084 /* Set variation to "0"; if variation is zero, done. */
1085 *variation_name = systype_names[0];
1086 if (variation == 0) {
1087 return;
1088 }
1089
1090 member = (variation >> 10) & 0x3f; /* member ID is a bit-field */
1091
1092 cpu &= 0xffffffff; /* make it usable */
1093
1094 switch (type) { /* select by family */
1095 default: /* default to variation "0" for now */
1096 break;
1097 case ST_DEC_EB164:
03e1f044
DC
1098 if (member >= ARRAY_SIZE(eb164_indices))
1099 break;
1100 *variation_name = eb164_names[eb164_indices[member]];
1da177e4
LT
1101 /* PC164 may show as EB164 variation, but with EV56 CPU,
1102 so, since no true EB164 had anything but EV5... */
1103 if (eb164_indices[member] == 0 && cpu == EV56_CPU)
1104 *variation_name = eb164_names[1]; /* make it PC164 */
1105 break;
1106 case ST_DEC_ALCOR:
25c8716c 1107 if (member < ARRAY_SIZE(alcor_indices))
1da177e4
LT
1108 *variation_name = alcor_names[alcor_indices[member]];
1109 break;
1110 case ST_DEC_EB64P:
25c8716c 1111 if (member < ARRAY_SIZE(eb64p_indices))
1da177e4
LT
1112 *variation_name = eb64p_names[eb64p_indices[member]];
1113 break;
1114 case ST_DEC_EB66:
25c8716c 1115 if (member < ARRAY_SIZE(eb66_indices))
1da177e4
LT
1116 *variation_name = eb66_names[eb66_indices[member]];
1117 break;
1118 case ST_DEC_MARVEL:
25c8716c 1119 if (member < ARRAY_SIZE(marvel_indices))
1da177e4
LT
1120 *variation_name = marvel_names[marvel_indices[member]];
1121 break;
1122 case ST_DEC_RAWHIDE:
25c8716c 1123 if (member < ARRAY_SIZE(rawhide_indices))
1da177e4
LT
1124 *variation_name = rawhide_names[rawhide_indices[member]];
1125 break;
1126 case ST_DEC_TITAN:
1127 *variation_name = titan_names[0]; /* default */
25c8716c 1128 if (member < ARRAY_SIZE(titan_indices))
1da177e4
LT
1129 *variation_name = titan_names[titan_indices[member]];
1130 break;
1131 case ST_DEC_TSUNAMI:
25c8716c 1132 if (member < ARRAY_SIZE(tsunami_indices))
1da177e4
LT
1133 *variation_name = tsunami_names[tsunami_indices[member]];
1134 break;
1135 }
1136}
1137
1138/*
1139 * A change was made to the HWRPB via an ECO and the following code
1140 * tracks a part of the ECO. In HWRPB versions less than 5, the ECO
1141 * was not implemented in the console firmware. If it's revision 5 or
1142 * greater we can get the name of the platform as an ASCII string from
1143 * the HWRPB. That's what this function does. It checks the revision
1144 * level and if the string is in the HWRPB it returns the address of
1145 * the string--a pointer to the name of the platform.
1146 *
1147 * Returns:
1148 * - Pointer to a ASCII string if it's in the HWRPB
1149 * - Pointer to a blank string if the data is not in the HWRPB.
1150 */
1151
1152static char *
1153platform_string(void)
1154{
1155 struct dsr_struct *dsr;
1156 static char unk_system_string[] = "N/A";
1157
1158 /* Go to the console for the string pointer.
1159 * If the rpb_vers is not 5 or greater the rpb
1160 * is old and does not have this data in it.
1161 */
1162 if (hwrpb->revision < 5)
1163 return (unk_system_string);
1164 else {
1165 /* The Dynamic System Recognition struct
1166 * has the system platform name starting
1167 * after the character count of the string.
1168 */
1169 dsr = ((struct dsr_struct *)
1170 ((char *)hwrpb + hwrpb->dsr_offset));
1171 return ((char *)dsr + (dsr->sysname_off +
1172 sizeof(long)));
1173 }
1174}
1175
1176static int
1177get_nr_processors(struct percpu_struct *cpubase, unsigned long num)
1178{
1179 struct percpu_struct *cpu;
1180 unsigned long i;
1181 int count = 0;
1182
1183 for (i = 0; i < num; i++) {
1184 cpu = (struct percpu_struct *)
1185 ((char *)cpubase + i*hwrpb->processor_size);
1186 if ((cpu->flags & 0x1cc) == 0x1cc)
1187 count++;
1188 }
1189 return count;
1190}
1191
1192static void
1193show_cache_size (struct seq_file *f, const char *which, int shape)
1194{
1195 if (shape == -1)
1196 seq_printf (f, "%s\t\t: n/a\n", which);
1197 else if (shape == 0)
1198 seq_printf (f, "%s\t\t: unknown\n", which);
1199 else
1200 seq_printf (f, "%s\t\t: %dK, %d-way, %db line\n",
1201 which, shape >> 10, shape & 15,
1202 1 << ((shape >> 4) & 15));
1203}
1204
1205static int
1206show_cpuinfo(struct seq_file *f, void *slot)
1207{
1208 extern struct unaligned_stat {
1209 unsigned long count, va, pc;
1210 } unaligned[2];
1211
1212 static char cpu_names[][8] = {
1213 "EV3", "EV4", "Simulate", "LCA4", "EV5", "EV45", "EV56",
1214 "EV6", "PCA56", "PCA57", "EV67", "EV68CB", "EV68AL",
1215 "EV68CX", "EV7", "EV79", "EV69"
1216 };
1217
1218 struct percpu_struct *cpu = slot;
1219 unsigned int cpu_index;
1220 char *cpu_name;
1221 char *systype_name;
1222 char *sysvariation_name;
1223 int nr_processors;
fddd87d6 1224 unsigned long timer_freq;
1da177e4
LT
1225
1226 cpu_index = (unsigned) (cpu->type - 1);
1227 cpu_name = "Unknown";
25c8716c 1228 if (cpu_index < ARRAY_SIZE(cpu_names))
1da177e4
LT
1229 cpu_name = cpu_names[cpu_index];
1230
1231 get_sysnames(hwrpb->sys_type, hwrpb->sys_variation,
1232 cpu->type, &systype_name, &sysvariation_name);
1233
1234 nr_processors = get_nr_processors(cpu, hwrpb->nr_processors);
1235
fddd87d6
RH
1236#if CONFIG_HZ == 1024 || CONFIG_HZ == 1200
1237 timer_freq = (100UL * hwrpb->intr_freq) / 4096;
1238#else
1239 timer_freq = 100UL * CONFIG_HZ;
1240#endif
1241
1da177e4
LT
1242 seq_printf(f, "cpu\t\t\t: Alpha\n"
1243 "cpu model\t\t: %s\n"
1244 "cpu variation\t\t: %ld\n"
1245 "cpu revision\t\t: %ld\n"
1246 "cpu serial number\t: %s\n"
1247 "system type\t\t: %s\n"
1248 "system variation\t: %s\n"
1249 "system revision\t\t: %ld\n"
1250 "system serial number\t: %s\n"
1251 "cycle frequency [Hz]\t: %lu %s\n"
1252 "timer frequency [Hz]\t: %lu.%02lu\n"
1253 "page size [bytes]\t: %ld\n"
1254 "phys. address bits\t: %ld\n"
1255 "max. addr. space #\t: %ld\n"
1256 "BogoMIPS\t\t: %lu.%02lu\n"
1257 "kernel unaligned acc\t: %ld (pc=%lx,va=%lx)\n"
1258 "user unaligned acc\t: %ld (pc=%lx,va=%lx)\n"
1259 "platform string\t\t: %s\n"
1260 "cpus detected\t\t: %d\n",
1261 cpu_name, cpu->variation, cpu->revision,
1262 (char*)cpu->serial_no,
1263 systype_name, sysvariation_name, hwrpb->sys_revision,
1264 (char*)hwrpb->ssn,
1265 est_cycle_freq ? : hwrpb->cycle_freq,
1266 est_cycle_freq ? "est." : "",
fddd87d6 1267 timer_freq / 100, timer_freq % 100,
1da177e4
LT
1268 hwrpb->pagesize,
1269 hwrpb->pa_bits,
1270 hwrpb->max_asn,
1271 loops_per_jiffy / (500000/HZ),
1272 (loops_per_jiffy / (5000/HZ)) % 100,
1273 unaligned[0].count, unaligned[0].pc, unaligned[0].va,
1274 unaligned[1].count, unaligned[1].pc, unaligned[1].va,
1275 platform_string(), nr_processors);
1276
1277#ifdef CONFIG_SMP
5f0e3da6 1278 seq_printf(f, "cpus active\t\t: %u\n"
1da177e4 1279 "cpu active mask\t\t: %016lx\n",
81740fc6 1280 num_online_cpus(), cpumask_bits(cpu_possible_mask)[0]);
1da177e4
LT
1281#endif
1282
1283 show_cache_size (f, "L1 Icache", alpha_l1i_cacheshape);
1284 show_cache_size (f, "L1 Dcache", alpha_l1d_cacheshape);
1285 show_cache_size (f, "L2 cache", alpha_l2_cacheshape);
1286 show_cache_size (f, "L3 cache", alpha_l3_cacheshape);
1287
1288 return 0;
1289}
1290
1291static int __init
1292read_mem_block(int *addr, int stride, int size)
1293{
1294 long nloads = size / stride, cnt, tmp;
1295
1296 __asm__ __volatile__(
1297 " rpcc %0\n"
1298 "1: ldl %3,0(%2)\n"
1299 " subq %1,1,%1\n"
1300 /* Next two XORs introduce an explicit data dependency between
1301 consecutive loads in the loop, which will give us true load
1302 latency. */
1303 " xor %3,%2,%2\n"
1304 " xor %3,%2,%2\n"
1305 " addq %2,%4,%2\n"
1306 " bne %1,1b\n"
1307 " rpcc %3\n"
1308 " subl %3,%0,%0\n"
1309 : "=&r" (cnt), "=&r" (nloads), "=&r" (addr), "=&r" (tmp)
1310 : "r" (stride), "1" (nloads), "2" (addr));
1311
1312 return cnt / (size / stride);
1313}
1314
1315#define CSHAPE(totalsize, linesize, assoc) \
1316 ((totalsize & ~0xff) | (linesize << 4) | assoc)
1317
1318/* ??? EV5 supports up to 64M, but did the systems with more than
1319 16M of BCACHE ever exist? */
1320#define MAX_BCACHE_SIZE 16*1024*1024
1321
1322/* Note that the offchip caches are direct mapped on all Alphas. */
1323static int __init
1324external_cache_probe(int minsize, int width)
1325{
1326 int cycles, prev_cycles = 1000000;
1327 int stride = 1 << width;
1328 long size = minsize, maxsize = MAX_BCACHE_SIZE * 2;
1329
1330 if (maxsize > (max_low_pfn + 1) << PAGE_SHIFT)
74fd1b68 1331 maxsize = 1 << (ilog2(max_low_pfn + 1) + PAGE_SHIFT);
1da177e4
LT
1332
1333 /* Get the first block cached. */
1334 read_mem_block(__va(0), stride, size);
1335
1336 while (size < maxsize) {
1337 /* Get an average load latency in cycles. */
1338 cycles = read_mem_block(__va(0), stride, size);
1339 if (cycles > prev_cycles * 2) {
1340 /* Fine, we exceed the cache. */
1341 printk("%ldK Bcache detected; load hit latency %d "
1342 "cycles, load miss latency %d cycles\n",
1343 size >> 11, prev_cycles, cycles);
1344 return CSHAPE(size >> 1, width, 1);
1345 }
1346 /* Try to get the next block cached. */
1347 read_mem_block(__va(size), stride, size);
1348 prev_cycles = cycles;
1349 size <<= 1;
1350 }
1351 return -1; /* No BCACHE found. */
1352}
1353
1354static void __init
1355determine_cpu_caches (unsigned int cpu_type)
1356{
1357 int L1I, L1D, L2, L3;
1358
1359 switch (cpu_type) {
1360 case EV4_CPU:
1361 case EV45_CPU:
1362 {
1363 if (cpu_type == EV4_CPU)
1364 L1I = CSHAPE(8*1024, 5, 1);
1365 else
1366 L1I = CSHAPE(16*1024, 5, 1);
1367 L1D = L1I;
1368 L3 = -1;
1369
1370 /* BIU_CTL is a write-only Abox register. PALcode has a
1371 shadow copy, and may be available from some versions
1372 of the CSERVE PALcall. If we can get it, then
1373
1374 unsigned long biu_ctl, size;
1375 size = 128*1024 * (1 << ((biu_ctl >> 28) & 7));
1376 L2 = CSHAPE (size, 5, 1);
1377
1378 Unfortunately, we can't rely on that.
1379 */
1380 L2 = external_cache_probe(128*1024, 5);
1381 break;
1382 }
1383
1384 case LCA4_CPU:
1385 {
1386 unsigned long car, size;
1387
1388 L1I = L1D = CSHAPE(8*1024, 5, 1);
1389 L3 = -1;
1390
1391 car = *(vuip) phys_to_virt (0x120000078UL);
1392 size = 64*1024 * (1 << ((car >> 5) & 7));
1393 /* No typo -- 8 byte cacheline size. Whodathunk. */
1394 L2 = (car & 1 ? CSHAPE (size, 3, 1) : -1);
1395 break;
1396 }
1397
1398 case EV5_CPU:
1399 case EV56_CPU:
1400 {
1401 unsigned long sc_ctl, width;
1402
1403 L1I = L1D = CSHAPE(8*1024, 5, 1);
1404
1405 /* Check the line size of the Scache. */
1406 sc_ctl = *(vulp) phys_to_virt (0xfffff000a8UL);
1407 width = sc_ctl & 0x1000 ? 6 : 5;
1408 L2 = CSHAPE (96*1024, width, 3);
1409
1410 /* BC_CONTROL and BC_CONFIG are write-only IPRs. PALcode
1411 has a shadow copy, and may be available from some versions
1412 of the CSERVE PALcall. If we can get it, then
1413
1414 unsigned long bc_control, bc_config, size;
1415 size = 1024*1024 * (1 << ((bc_config & 7) - 1));
1416 L3 = (bc_control & 1 ? CSHAPE (size, width, 1) : -1);
1417
1418 Unfortunately, we can't rely on that.
1419 */
1420 L3 = external_cache_probe(1024*1024, width);
1421 break;
1422 }
1423
1424 case PCA56_CPU:
1425 case PCA57_CPU:
1426 {
1da177e4
LT
1427 if (cpu_type == PCA56_CPU) {
1428 L1I = CSHAPE(16*1024, 6, 1);
1429 L1D = CSHAPE(8*1024, 5, 1);
1430 } else {
1431 L1I = CSHAPE(32*1024, 6, 2);
1432 L1D = CSHAPE(16*1024, 5, 1);
1433 }
1434 L3 = -1;
1435
280da4e4
RH
1436#if 0
1437 unsigned long cbox_config, size;
1438
1da177e4
LT
1439 cbox_config = *(vulp) phys_to_virt (0xfffff00008UL);
1440 size = 512*1024 * (1 << ((cbox_config >> 12) & 3));
1441
1da177e4
LT
1442 L2 = ((cbox_config >> 31) & 1 ? CSHAPE (size, 6, 1) : -1);
1443#else
1444 L2 = external_cache_probe(512*1024, 6);
1445#endif
1446 break;
1447 }
1448
1449 case EV6_CPU:
1450 case EV67_CPU:
1451 case EV68CB_CPU:
1452 case EV68AL_CPU:
1453 case EV68CX_CPU:
1454 case EV69_CPU:
1455 L1I = L1D = CSHAPE(64*1024, 6, 2);
1456 L2 = external_cache_probe(1024*1024, 6);
1457 L3 = -1;
1458 break;
1459
1460 case EV7_CPU:
1461 case EV79_CPU:
1462 L1I = L1D = CSHAPE(64*1024, 6, 2);
1463 L2 = CSHAPE(7*1024*1024/4, 6, 7);
1464 L3 = -1;
1465 break;
1466
1467 default:
1468 /* Nothing known about this cpu type. */
1469 L1I = L1D = L2 = L3 = 0;
1470 break;
1471 }
1472
1473 alpha_l1i_cacheshape = L1I;
1474 alpha_l1d_cacheshape = L1D;
1475 alpha_l2_cacheshape = L2;
1476 alpha_l3_cacheshape = L3;
1477}
1478
1479/*
1480 * We show only CPU #0 info.
1481 */
1482static void *
1483c_start(struct seq_file *f, loff_t *pos)
1484{
1485 return *pos ? NULL : (char *)hwrpb + hwrpb->processor_offset;
1486}
1487
1488static void *
1489c_next(struct seq_file *f, void *v, loff_t *pos)
1490{
1491 return NULL;
1492}
1493
1494static void
1495c_stop(struct seq_file *f, void *v)
1496{
1497}
1498
03a44825 1499const struct seq_operations cpuinfo_op = {
1da177e4
LT
1500 .start = c_start,
1501 .next = c_next,
1502 .stop = c_stop,
1503 .show = show_cpuinfo,
1504};
1505
1506
1507static int
1508alpha_panic_event(struct notifier_block *this, unsigned long event, void *ptr)
1509{
1510#if 1
1511 /* FIXME FIXME FIXME */
1512 /* If we are using SRM and serial console, just hard halt here. */
1513 if (alpha_using_srm && srmcons_output)
1514 __halt();
1515#endif
1516 return NOTIFY_DONE;
1517}
e5c6c8e4
MN
1518
1519static __init int add_pcspkr(void)
1520{
1521 struct platform_device *pd;
1522 int ret;
1523
1524 pd = platform_device_alloc("pcspkr", -1);
1525 if (!pd)
1526 return -ENOMEM;
1527
1528 ret = platform_device_add(pd);
1529 if (ret)
1530 platform_device_put(pd);
1531
1532 return ret;
1533}
1534device_initcall(add_pcspkr);