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8284328c SP |
1 | What is smsc-ece1099? |
2 | ---------------------- | |
3 | ||
4 | The ECE1099 is a 40-Pin 3.3V Keyboard Scan Expansion | |
5 | or GPIO Expansion device. The device supports a keyboard | |
6 | scan matrix of 23x8. The device is connected to a Master | |
7 | via the SMSC BC-Link interface or via the SMBus. | |
8 | Keypad scan Input(KSI) and Keypad Scan Output(KSO) signals | |
9 | are multiplexed with GPIOs. | |
10 | ||
11 | Interrupt generation | |
12 | -------------------- | |
13 | ||
14 | Interrupts can be generated by an edge detection on a GPIO | |
15 | pin or an edge detection on one of the bus interface pins. | |
16 | Interrupts can also be detected on the keyboard scan interface. | |
17 | The bus interrupt pin (BC_INT# or SMBUS_INT#) is asserted if | |
18 | any bit in one of the Interrupt Status registers is 1 and | |
19 | the corresponding Interrupt Mask bit is also 1. | |
20 | ||
21 | In order for software to determine which device is the source | |
22 | of an interrupt, it should first read the Group Interrupt Status Register | |
23 | to determine which Status register group is a source for the interrupt. | |
24 | Software should read both the Status register and the associated Mask register, | |
25 | then AND the two values together. Bits that are 1 in the result of the AND | |
26 | are active interrupts. Software clears an interrupt by writing a 1 to the | |
27 | corresponding bit in the Status register. | |
28 | ||
29 | Communication Protocol | |
30 | ---------------------- | |
31 | ||
32 | - SMbus slave Interface | |
33 | The host processor communicates with the ECE1099 device | |
34 | through a series of read/write registers via the SMBus | |
35 | interface. SMBus is a serial communication protocol between | |
36 | a computer host and its peripheral devices. The SMBus data | |
37 | rate is 10KHz minimum to 400 KHz maximum | |
38 | ||
39 | - Slave Bus Interface | |
40 | The ECE1099 device SMBus implementation is a subset of the | |
41 | SMBus interface to the host. The device is a slave-only SMBus device. | |
42 | The implementation in the device is a subset of SMBus since it | |
43 | only supports four protocols. | |
44 | ||
45 | The Write Byte, Read Byte, Send Byte, and Receive Byte protocols are the | |
46 | only valid SMBus protocols for the device. | |
47 | ||
48 | - BC-LinkTM Interface | |
49 | The BC-Link is a proprietary bus that allows communication | |
50 | between a Master device and a Companion device. The Master | |
51 | device uses this serial bus to read and write registers | |
52 | located on the Companion device. The bus comprises three signals, | |
53 | BC_CLK, BC_DAT and BC_INT#. The Master device always provides the | |
54 | clock, BC_CLK, and the Companion device is the source for an | |
55 | independent asynchronous interrupt signal, BC_INT#. The ECE1099 | |
56 | supports BC-Link speeds up to 24MHz. |