Merge branch 'uaccess-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs
[linux-2.6-block.git] / Documentation / i2c / i2c-protocol
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1This document describes the i2c protocol. Or will, when it is finished :-)
2
3Key to symbols
4==============
5
6S (1 bit) : Start bit
7P (1 bit) : Stop bit
8Rd/Wr (1 bit) : Read/Write bit. Rd equals 1, Wr equals 0.
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9A, NA (1 bit) : Accept and reverse accept bit.
10Addr (7 bits): I2C 7 bit address. Note that this can be expanded as usual to
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11 get a 10 bit I2C address.
12Comm (8 bits): Command byte, a data byte which often selects a register on
13 the device.
14Data (8 bits): A plain data byte. Sometimes, I write DataLow, DataHigh
15 for 16 bit data.
16Count (8 bits): A data byte containing the length of a block operation.
17
18[..]: Data sent by I2C device, as opposed to data sent by the host adapter.
19
20
21Simple send transaction
22======================
23
24This corresponds to i2c_master_send.
25
26 S Addr Wr [A] Data [A] Data [A] ... [A] Data [A] P
27
28
29Simple receive transaction
30===========================
31
32This corresponds to i2c_master_recv
33
34 S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P
35
36
37Combined transactions
38====================
39
40This corresponds to i2c_transfer
41
42They are just like the above transactions, but instead of a stop bit P
43a start bit S is sent and the transaction continues. An example of
44a byte read, followed by a byte write:
45
46 S Addr Rd [A] [Data] NA S Addr Wr [A] Data [A] P
47
48
49Modified transactions
50=====================
51
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52The following modifications to the I2C protocol can also be generated by
53setting these flags for i2c messages. With the exception of I2C_M_NOSTART, they
54are usually only needed to work around device issues:
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56I2C_M_IGNORE_NAK:
57 Normally message is interrupted immediately if there is [NA] from the
58 client. Setting this flag treats any [NA] as [A], and all of
59 message is sent.
60 These messages may still fail to SCL lo->hi timeout.
61
62I2C_M_NO_RD_ACK:
63 In a read message, master A/NA bit is skipped.
64
65I2C_M_NOSTART:
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66 In a combined transaction, no 'S Addr Wr/Rd [A]' is generated at some
67 point. For example, setting I2C_M_NOSTART on the second partial message
68 generates something like:
69 S Addr Rd [A] [Data] NA Data [A] P
70 If you set the I2C_M_NOSTART variable for the first partial message,
71 we do not generate Addr, but we do generate the startbit S. This will
72 probably confuse all other clients on your bus, so don't try this.
73
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74 This is often used to gather transmits from multiple data buffers in
75 system memory into something that appears as a single transfer to the
76 I2C device but may also be used between direction changes by some
77 rare devices.
78
9f02fba8 79I2C_M_REV_DIR_ADDR:
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80 This toggles the Rd/Wr flag. That is, if you want to do a write, but
81 need to emit an Rd instead of a Wr, or vice versa, you set this
82 flag. For example:
83 S Addr Rd [A] Data [A] Data [A] ... [A] Data [A] P
84
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85I2C_M_STOP:
86 Force a stop condition (P) after the message. Some I2C related protocols
87 like SCCB require that. Normally, you really don't want to get interrupted
88 between the messages of one transfer.