Docs: dt: add generic MSI bindings
[linux-2.6-block.git] / Documentation / devicetree / bindings / net / cpsw.txt
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1TI SoC Ethernet Switch Controller Device Tree Bindings
2------------------------------------------------------
3
4Required properties:
5- compatible : Should be "ti,cpsw"
6- reg : physical base address and size of the cpsw
7 registers map
8- interrupts : property with a value describing the interrupt
9 number
10- interrupt-parent : The parent interrupt controller
11- cpdma_channels : Specifies number of channels in CPDMA
2eb32b0a 12- ale_entries : Specifies No of entries ALE can hold
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13- bd_ram_size : Specifies internal descriptor RAM size
14- rx_descs : Specifies number of Rx descriptors
15- mac_control : Specifies Default MAC control register content
16 for the specific platform
17- slaves : Specifies number for slaves
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18- active_slave : Specifies the slave to use for time stamping,
19 ethtool and SIOCGMIIPHY
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20- cpts_clock_mult : Numerator to convert input clock ticks into nanoseconds
21- cpts_clock_shift : Denominator to convert input clock ticks into nanoseconds
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22
23Optional properties:
24- ti,hwmods : Must be "cpgmac0"
25- no_bd_ram : Must be 0 or 1
d9ba8f9e 26- dual_emac : Specifies Switch to act as Dual EMAC
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27- syscon : Phandle to the system control device node, which is
28 the control module device of the am33x
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29
30Slave Properties:
31Required properties:
32- phy_id : Specifies slave phy id
e8f08ee0 33- phy-mode : See ethernet.txt file in the same directory
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34
35Optional properties:
d9ba8f9e 36- dual_emac_res_vlan : Specifies VID to be used to segregate the ports
e4a9839b 37- mac-address : See ethernet.txt file in the same directory
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38
39Note: "ti,hwmods" field is used to fetch the base address and irq
40resources from TI, omap hwmod data base during device registration.
41Future plan is to migrate hwmod data base contents into device tree
42blob so that, all the required data will be used from device tree dts
43file.
44
45Examples:
46
47 mac: ethernet@4A100000 {
48 compatible = "ti,cpsw";
49 reg = <0x4A100000 0x1000>;
50 interrupts = <55 0x4>;
51 interrupt-parent = <&intc>;
e07b94f1 52 cpdma_channels = <8>;
e07b94f1 53 ale_entries = <1024>;
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54 bd_ram_size = <0x2000>;
55 no_bd_ram = <0>;
56 rx_descs = <64>;
57 mac_control = <0x20>;
58 slaves = <2>;
e86ac13b 59 active_slave = <0>;
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60 cpts_clock_mult = <0x80000000>;
61 cpts_clock_shift = <29>;
0ba517b1 62 syscon = <&cm>;
e07b94f1 63 cpsw_emac0: slave@0 {
549985ee 64 phy_id = <&davinci_mdio>, <0>;
c5ceea7a 65 phy-mode = "rgmii-txid";
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66 /* Filled in by U-Boot */
67 mac-address = [ 00 00 00 00 00 00 ];
2eb32b0a 68 };
e07b94f1 69 cpsw_emac1: slave@1 {
549985ee 70 phy_id = <&davinci_mdio>, <1>;
c5ceea7a 71 phy-mode = "rgmii-txid";
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72 /* Filled in by U-Boot */
73 mac-address = [ 00 00 00 00 00 00 ];
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74 };
75 };
76
77(or)
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78 mac: ethernet@4A100000 {
79 compatible = "ti,cpsw";
80 ti,hwmods = "cpgmac0";
e07b94f1 81 cpdma_channels = <8>;
e07b94f1 82 ale_entries = <1024>;
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83 bd_ram_size = <0x2000>;
84 no_bd_ram = <0>;
85 rx_descs = <64>;
86 mac_control = <0x20>;
87 slaves = <2>;
e86ac13b 88 active_slave = <0>;
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89 cpts_clock_mult = <0x80000000>;
90 cpts_clock_shift = <29>;
0ba517b1 91 syscon = <&cm>;
e07b94f1 92 cpsw_emac0: slave@0 {
549985ee 93 phy_id = <&davinci_mdio>, <0>;
c5ceea7a 94 phy-mode = "rgmii-txid";
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95 /* Filled in by U-Boot */
96 mac-address = [ 00 00 00 00 00 00 ];
2eb32b0a 97 };
e07b94f1 98 cpsw_emac1: slave@1 {
549985ee 99 phy_id = <&davinci_mdio>, <1>;
c5ceea7a 100 phy-mode = "rgmii-txid";
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101 /* Filled in by U-Boot */
102 mac-address = [ 00 00 00 00 00 00 ];
2eb32b0a 103 };
2eb32b0a 104 };