dt: bindings: Make compatible optional for mmc function nodes
[linux-2.6-block.git] / Documentation / devicetree / bindings / mmc / mmc.txt
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1These properties are common to multiple MMC host controllers. Any host
2that requires the respective functionality should implement them using
3these definitions.
4
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5Interpreted by the OF core:
6- reg: Registers location and length.
7- interrupts: Interrupts used by the MMC controller.
8
abe1e05d 9Card detection:
b477426e 10If no property below is supplied, host native card detect is used.
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11Only one of the properties in this section should be supplied:
12 - broken-cd: There is no card detection available; polling must be used.
13 - cd-gpios: Specify GPIOs for card detection, see gpio binding
14 - non-removable: non-removable slot (like eMMC); assume always present.
15
7f217794 16Optional properties:
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SG
17- bus-width: Number of data lines, can be <1>, <4>, or <8>. The default
18 will be <1> if the property is absent.
ed3efc1c 19- wp-gpios: Specify GPIOs for write protection, see gpio binding
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GL
20- cd-inverted: when present, polarity on the CD line is inverted. See the note
21 below for the case, when a GPIO is used for the CD line
22- wp-inverted: when present, polarity on the WP line is inverted. See the note
23 below for the case, when a GPIO is used for the WP line
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LPC
24- disable-wp: When set no physical WP line is present. This property should
25 only be specified when the controller has a dedicated write-protect
26 detection logic. If a GPIO is always used for the write-protect detection
27 logic it is sufficient to not specify wp-gpios property in the absence of a WP
28 line.
7f217794 29- max-frequency: maximum operating clock frequency
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30- no-1-8-v: when present, denotes that 1.8v card voltage is not supported on
31 this system, even if the controller claims it is.
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32- cap-sd-highspeed: SD high-speed timing is supported
33- cap-mmc-highspeed: MMC high-speed timing is supported
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34- sd-uhs-sdr12: SD UHS SDR12 speed is supported
35- sd-uhs-sdr25: SD UHS SDR25 speed is supported
36- sd-uhs-sdr50: SD UHS SDR50 speed is supported
37- sd-uhs-sdr104: SD UHS SDR104 speed is supported
38- sd-uhs-ddr50: SD UHS DDR50 speed is supported
2fdb6e2d 39- cap-power-off-card: powering off the card is safe
794f1578 40- cap-mmc-hw-reset: eMMC hardware reset is supported
2fdb6e2d 41- cap-sdio-irq: enable SDIO IRQ signalling on this interface
5a36d6bc 42- full-pwr-cycle: full power cycle of the card is supported
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PG
43- mmc-ddr-1_8v: eMMC high-speed DDR mode(1.8V I/O) is supported
44- mmc-ddr-1_2v: eMMC high-speed DDR mode(1.2V I/O) is supported
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45- mmc-hs200-1_8v: eMMC HS200 mode(1.8V I/O) is supported
46- mmc-hs200-1_2v: eMMC HS200 mode(1.2V I/O) is supported
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47- mmc-hs400-1_8v: eMMC HS400 mode(1.8V I/O) is supported
48- mmc-hs400-1_2v: eMMC HS400 mode(1.2V I/O) is supported
a60119ce 49- mmc-hs400-enhanced-strobe: eMMC HS400 enhanced strobe mode is supported
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50- dsr: Value the card's (optional) Driver Stage Register (DSR) should be
51 programmed with. Valid range: [0 .. 0xffff].
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52- no-sdio: controller is limited to send sdio cmd during initialization
53- no-sd: controller is limited to send sd cmd during initialization
54- no-mmc: controller is limited to send mmc cmd during initialization
7f217794 55
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56*NOTE* on CD and WP polarity. To use common for all SD/MMC host controllers line
57polarity properties, we have to fix the meaning of the "normal" and "inverted"
58line levels. We choose to follow the SDHCI standard, which specifies both those
59lines as "active low." Therefore, using the "cd-inverted" property means, that
60the CD line is active high, i.e. it is high, when a card is inserted. Similar
61logic applies to the "wp-inverted" property.
62
63CD and WP lines can be implemented on the hardware in one of two ways: as GPIOs,
64specified in cd-gpios and wp-gpios properties, or as dedicated pins. Polarity of
65dedicated pins can be specified, using *-inverted properties. GPIO polarity can
66also be specified using the OF_GPIO_ACTIVE_LOW flag. This creates an ambiguity
67in the latter case. We choose to use the XOR logic for GPIO CD and WP lines.
68This means, the two properties are "superimposed," for example leaving the
69OF_GPIO_ACTIVE_LOW flag clear and specifying the respective *-inverted
70property results in a double-inversion and actually means the "normal" line
71polarity is in effect.
72
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73Optional SDIO properties:
74- keep-power-in-suspend: Preserves card power during a suspend/resume cycle
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SH
75- wakeup-source: Enables wake up of host system on SDIO IRQ assertion
76 (Legacy property supported: "enable-sdio-wakeup")
e5d0e9c5 77
a31edf1e 78
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UH
79MMC power sequences:
80--------------------
81
82System on chip designs may specify a specific MMC power sequence. To
83successfully detect an (e)MMC/SD/SDIO card, that power sequence must be
84maintained while initializing the card.
85
86Optional property:
87- mmc-pwrseq: phandle to the MMC power sequence node. See "mmc-pwrseq-*"
88 for documentation of MMC power sequence bindings.
89
90
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91Use of Function subnodes
92------------------------
93
94On embedded systems the cards connected to a host may need additional
95properties. These can be specified in subnodes to the host controller node.
96The subnodes are identified by the standard 'reg' property.
97Which information exactly can be specified depends on the bindings for the
98SDIO function driver for the subnode, as specified by the compatible string.
99
100Required host node properties when using function subnodes:
101- #address-cells: should be one. The cell is the slot id.
102- #size-cells: should be zero.
103
104Required function subnode properties:
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105- reg: Must contain the SDIO function number of the function this subnode
106 describes. A value of 0 denotes the memory SD function, values from
107 1 to 7 denote the SDIO functions.
108
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109Optional function subnode properties:
110- compatible: name of SDIO function following generic names recommended practice
111
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112
113Examples
114--------
115
116Basic example:
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117
118sdhci@ab000000 {
119 compatible = "sdhci";
120 reg = <0xab000000 0x200>;
121 interrupts = <23>;
122 bus-width = <4>;
123 cd-gpios = <&gpio 69 0>;
124 cd-inverted;
125 wp-gpios = <&gpio 70 0>;
126 max-frequency = <50000000>;
e5d0e9c5 127 keep-power-in-suspend;
71a0151c 128 wakeup-source;
0e6d6332 129 mmc-pwrseq = <&sdhci0_pwrseq>
7f217794 130}
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131
132Example with sdio function subnode:
133
134mmc3: mmc@01c12000 {
135 #address-cells = <1>;
136 #size-cells = <0>;
137
138 pinctrl-names = "default";
139 pinctrl-0 = <&mmc3_pins_a>;
140 vmmc-supply = <&reg_vmmc3>;
141 bus-width = <4>;
142 non-removable;
0e6d6332 143 mmc-pwrseq = <&sdhci0_pwrseq>
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144 status = "okay";
145
146 brcmf: bcrmf@1 {
147 reg = <1>;
148 compatible = "brcm,bcm43xx-fmac";
149 interrupt-parent = <&pio>;
150 interrupts = <10 8>; /* PH10 / EINT10 */
151 interrupt-names = "host-wake";
152 };
153};