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[linux-2.6-block.git] / Documentation / PCI / MSI-HOWTO.txt
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1 The MSI Driver Guide HOWTO
2 Tom L Nguyen tom.l.nguyen@intel.com
3 10/03/2003
4 Revised Feb 12, 2004 by Martine Silbermann
5 email: Martine.Silbermann@hp.com
6 Revised Jun 25, 2004 by Tom L Nguyen
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7 Revised Jul 9, 2008 by Matthew Wilcox <willy@linux.intel.com>
8 Copyright 2003, 2008 Intel Corporation
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9
101. About this guide
11
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12This guide describes the basics of Message Signaled Interrupts (MSIs),
13the advantages of using MSI over traditional interrupt mechanisms, how
14to change your driver to use MSI or MSI-X and some basic diagnostics to
15try if a device doesn't support MSIs.
16
17
182. What are MSIs?
19
20A Message Signaled Interrupt is a write from the device to a special
21address which causes an interrupt to be received by the CPU.
22
23The MSI capability was first specified in PCI 2.2 and was later enhanced
24in PCI 3.0 to allow each interrupt to be masked individually. The MSI-X
25capability was also introduced with PCI 3.0. It supports more interrupts
26per device than MSI and allows interrupts to be independently configured.
27
28Devices may support both MSI and MSI-X, but only one can be enabled at
29a time.
30
31
323. Why use MSIs?
33
34There are three reasons why using MSIs can give an advantage over
35traditional pin-based interrupts.
36
37Pin-based PCI interrupts are often shared amongst several devices.
38To support this, the kernel must call each interrupt handler associated
39with an interrupt, which leads to reduced performance for the system as
40a whole. MSIs are never shared, so this problem cannot arise.
41
42When a device writes data to memory, then raises a pin-based interrupt,
43it is possible that the interrupt may arrive before all the data has
44arrived in memory (this becomes more likely with devices behind PCI-PCI
45bridges). In order to ensure that all the data has arrived in memory,
46the interrupt handler must read a register on the device which raised
47the interrupt. PCI transaction ordering rules require that all the data
891f6925 48arrive in memory before the value may be returned from the register.
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49Using MSIs avoids this problem as the interrupt-generating write cannot
50pass the data writes, so by the time the interrupt is raised, the driver
51knows that all the data has arrived in memory.
52
53PCI devices can only support a single pin-based interrupt per function.
54Often drivers have to query the device to find out what event has
55occurred, slowing down interrupt handling for the common case. With
56MSIs, a device can support more interrupts, allowing each interrupt
57to be specialised to a different purpose. One possible design gives
58infrequent conditions (such as errors) their own interrupt which allows
59the driver to handle the normal interrupt handling path more efficiently.
60Other possible designs include giving one interrupt to each packet queue
61in a network card or each port in a storage controller.
62
63
644. How to use MSIs
65
66PCI devices are initialised to use pin-based interrupts. The device
67driver has to set up the device to use MSI or MSI-X. Not all machines
68support MSIs correctly, and for those machines, the APIs described below
69will simply fail and the device will continue to use pin-based interrupts.
70
714.1 Include kernel support for MSIs
72
73To support MSI or MSI-X, the kernel must be built with the CONFIG_PCI_MSI
74option enabled. This option is only available on some architectures,
75and it may depend on some other options also being set. For example,
76on x86, you must also enable X86_UP_APIC or SMP in order to see the
77CONFIG_PCI_MSI option.
78
794.2 Using MSI
80
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81Most of the hard work is done for the driver in the PCI layer. The driver
82simply has to request that the PCI layer set up the MSI capability for this
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83device.
84
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85To automatically use MSI or MSI-X interrupt vectors, use the following
86function:
7918b2dc 87
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88 int pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,
89 unsigned int max_vecs, unsigned int flags);
7918b2dc 90
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91which allocates up to max_vecs interrupt vectors for a PCI device. It
92returns the number of vectors allocated or a negative error. If the device
93has a requirements for a minimum number of vectors the driver can pass a
94min_vecs argument set to this limit, and the PCI core will return -ENOSPC
95if it can't meet the minimum number of vectors.
7918b2dc 96
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97The flags argument should normally be set to 0, but can be used to pass the
98PCI_IRQ_NOMSI and PCI_IRQ_NOMSIX flag in case a device claims to support
99MSI or MSI-X, but the support is broken, or to pass PCI_IRQ_NOLEGACY in
100case the device does not support legacy interrupt lines.
1da177e4 101
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102By default this function will spread the interrupts around the available
103CPUs, but this feature can be disabled by passing the PCI_IRQ_NOAFFINITY
104flag.
105
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106To get the Linux IRQ numbers passed to request_irq() and free_irq() and the
107vectors, use the following function:
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aff17164 109 int pci_irq_vector(struct pci_dev *dev, unsigned int nr);
1da177e4 110
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111Any allocated resources should be freed before removing the device using
112the following function:
1c8d7b0a 113
aff17164 114 void pci_free_irq_vectors(struct pci_dev *dev);
1c8d7b0a 115
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116If a device supports both MSI-X and MSI capabilities, this API will use the
117MSI-X facilities in preference to the MSI facilities. MSI-X supports any
118number of interrupts between 1 and 2048. In contrast, MSI is restricted to
119a maximum of 32 interrupts (and must be a power of two). In addition, the
120MSI interrupt vectors must be allocated consecutively, so the system might
121not be able to allocate as many vectors for MSI as it could for MSI-X. On
122some platforms, MSI interrupts must all be targeted at the same set of CPUs
123whereas MSI-X interrupts can all be targeted at different CPUs.
1c8d7b0a 124
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125If a device supports neither MSI-X or MSI it will fall back to a single
126legacy IRQ vector.
1c8d7b0a 127
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128The typical usage of MSI or MSI-X interrupts is to allocate as many vectors
129as possible, likely up to the limit supported by the device. If nvec is
130larger than the number supported by the device it will automatically be
131capped to the supported limit, so there is no need to query the number of
132vectors supported beforehand:
302a2523 133
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134 nvec = pci_alloc_irq_vectors(pdev, 1, nvec, 0);
135 if (nvec < 0)
136 goto out_err;
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137
138If a driver is unable or unwilling to deal with a variable number of MSI
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139interrupts it can request a particular number of interrupts by passing that
140number to pci_alloc_irq_vectors() function as both 'min_vecs' and
141'max_vecs' parameters:
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143 ret = pci_alloc_irq_vectors(pdev, nvec, nvec, 0);
144 if (ret < 0)
145 goto out_err;
ff1aa430 146
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147The most notorious example of the request type described above is enabling
148the single MSI mode for a device. It could be done by passing two 1s as
149'min_vecs' and 'max_vecs':
ff1aa430 150
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151 ret = pci_alloc_irq_vectors(pdev, 1, 1, 0);
152 if (ret < 0)
153 goto out_err;
ff1aa430 154
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155Some devices might not support using legacy line interrupts, in which case
156the PCI_IRQ_NOLEGACY flag can be used to fail the request if the platform
157can't provide MSI or MSI-X interrupts:
ff1aa430 158
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159 nvec = pci_alloc_irq_vectors(pdev, 1, nvec, PCI_IRQ_NOLEGACY);
160 if (nvec < 0)
161 goto out_err;
ff1aa430 162
aff17164 1634.3 Legacy APIs
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165The following old APIs to enable and disable MSI or MSI-X interrupts should
166not be used in new code:
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168 pci_enable_msi() /* deprecated */
169 pci_enable_msi_range() /* deprecated */
170 pci_enable_msi_exact() /* deprecated */
171 pci_disable_msi() /* deprecated */
172 pci_enable_msix_range() /* deprecated */
173 pci_enable_msix_exact() /* deprecated */
174 pci_disable_msix() /* deprecated */
c41ade2e 175
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176Additionally there are APIs to provide the number of supported MSI or MSI-X
177vectors: pci_msi_vec_count() and pci_msix_vec_count(). In general these
178should be avoided in favor of letting pci_alloc_irq_vectors() cap the
179number of vectors. If you have a legitimate special use case for the count
180of vectors we might have to revisit that decision and add a
181pci_nr_irq_vectors() helper that handles MSI and MSI-X transparently.
c41ade2e 182
aff17164 1834.4 Considerations when using MSIs
c41ade2e 184
aff17164 1854.4.1 Spinlocks
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186
187Most device drivers have a per-device spinlock which is taken in the
188interrupt handler. With pin-based interrupts or a single MSI, it is not
189necessary to disable interrupts (Linux guarantees the same interrupt will
190not be re-entered). If a device uses multiple interrupts, the driver
191must disable interrupts while the lock is held. If the device sends
192a different interrupt, the driver will deadlock trying to recursively
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193acquire the spinlock. Such deadlocks can be avoided by using
194spin_lock_irqsave() or spin_lock_irq() which disable local interrupts
195and acquire the lock (see Documentation/DocBook/kernel-locking).
c41ade2e 196
aff17164 1974.5 How to tell whether MSI/MSI-X is enabled on a device
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198
199Using 'lspci -v' (as root) may show some devices with "MSI", "Message
200Signalled Interrupts" or "MSI-X" capabilities. Each of these capabilities
4979de6e 201has an 'Enable' flag which is followed with either "+" (enabled)
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202or "-" (disabled).
203
204
2055. MSI quirks
206
207Several PCI chipsets or devices are known not to support MSIs.
208The PCI stack provides three ways to disable MSIs:
209
2101. globally
2112. on all devices behind a specific bridge
2123. on a single device
213
2145.1. Disabling MSIs globally
215
216Some host chipsets simply don't support MSIs properly. If we're
217lucky, the manufacturer knows this and has indicated it in the ACPI
4979de6e 218FADT table. In this case, Linux automatically disables MSIs.
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219Some boards don't include this information in the table and so we have
220to detect them ourselves. The complete list of these is found near the
221quirk_disable_all_msi() function in drivers/pci/quirks.c.
222
223If you have a board which has problems with MSIs, you can pass pci=nomsi
224on the kernel command line to disable MSIs on all devices. It would be
225in your best interests to report the problem to linux-pci@vger.kernel.org
226including a full 'lspci -v' so we can add the quirks to the kernel.
227
2285.2. Disabling MSIs below a bridge
229
230Some PCI bridges are not able to route MSIs between busses properly.
231In this case, MSIs must be disabled on all devices behind the bridge.
232
233Some bridges allow you to enable MSIs by changing some bits in their
234PCI configuration space (especially the Hypertransport chipsets such
235as the nVidia nForce and Serverworks HT2000). As with host chipsets,
236Linux mostly knows about them and automatically enables MSIs if it can.
e6b85a1f 237If you have a bridge unknown to Linux, you can enable
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238MSIs in configuration space using whatever method you know works, then
239enable MSIs on that bridge by doing:
240
241 echo 1 > /sys/bus/pci/devices/$bridge/msi_bus
242
243where $bridge is the PCI address of the bridge you've enabled (eg
2440000:00:0e.0).
245
246To disable MSIs, echo 0 instead of 1. Changing this value should be
1b8386f6 247done with caution as it could break interrupt handling for all devices
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248below this bridge.
249
250Again, please notify linux-pci@vger.kernel.org of any bridges that need
251special handling.
252
2535.3. Disabling MSIs on a single device
254
255Some devices are known to have faulty MSI implementations. Usually this
c2b65e18 256is handled in the individual device driver, but occasionally it's necessary
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257to handle this with a quirk. Some drivers have an option to disable use
258of MSI. While this is a convenient workaround for the driver author,
305af08c 259it is not good practice, and should not be emulated.
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260
2615.4. Finding why MSIs are disabled on a device
262
263From the above three sections, you can see that there are many reasons
264why MSIs may not be enabled for a given device. Your first step should
265be to examine your dmesg carefully to determine whether MSIs are enabled
266for your machine. You should also check your .config to be sure you
267have enabled CONFIG_PCI_MSI.
268
269Then, 'lspci -t' gives the list of bridges above a device. Reading
798c794d 270/sys/bus/pci/devices/*/msi_bus will tell you whether MSIs are enabled (1)
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271or disabled (0). If 0 is found in any of the msi_bus files belonging
272to bridges between the PCI root and the device, MSIs are disabled.
273
274It is also worth checking the device driver to see whether it supports MSIs.
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275For example, it may contain calls to pci_enable_msi_range() or
276pci_enable_msix_range().